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authorPunit Agrawal <punit.agrawal@arm.com>2014-11-18 06:41:25 -0500
committerWill Deacon <will.deacon@arm.com>2014-11-20 11:34:31 -0500
commitbd35a4adc4131c530ec7d90242555eac7b3dbe3f (patch)
tree61db668ee8924e5dae4aa53fadf8b8ffde6bba3b /arch/arm64/kernel/insn.c
parent587064b610c703f259317d00dc37bf6d40f4fc74 (diff)
arm64: Port SWP/SWPB emulation support from arm
The SWP instruction was deprecated in the ARMv6 architecture. The ARMv7 multiprocessing extensions mandate that SWP/SWPB instructions are treated as undefined from reset, with the ability to enable them through the System Control Register SW bit. With ARMv8, the option to enable these instructions through System Control Register was dropped as well. To support legacy applications using these instructions, port the emulation of the SWP and SWPB instructions from the arm port to arm64. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/insn.c')
-rw-r--r--arch/arm64/kernel/insn.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index ab00eb58d385..63122dcd8524 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -964,3 +964,11 @@ bool aarch32_insn_is_wide(u32 insn)
964{ 964{
965 return insn >= 0xe800; 965 return insn >= 0xe800;
966} 966}
967
968/*
969 * Macros/defines for extracting register numbers from instruction.
970 */
971u32 aarch32_insn_extract_reg_num(u32 insn, int offset)
972{
973 return (insn & (0xf << offset)) >> offset;
974}