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authorMark Rutland <mark.rutland@arm.com>2014-11-25 08:27:41 -0500
committerWill Deacon <will.deacon@arm.com>2014-11-25 10:56:43 -0500
commit9760270c36a4d2ac640ea6294f4f8634a8b27121 (patch)
treebe7e969449fcf8825f5b55ed89ebb8213163a27e /arch/arm64/kernel/cpuinfo.c
parent1cefdaea613bcd247b2235079fcbb0ca4687542d (diff)
arm64: sanity checks: ignore ID_MMFR0.AuxReg
It seems that Cortex-A53 r0p4 added support for AIFSR and ADFSR, and ID_MMFR0.AuxReg has been updated accordingly to report this fact. As Cortex-A53 could be paired with CPUs which do not implement these registers (e.g. all current revisions of Cortex-A57), this may trigger a sanity check failure at boot. The AuxReg value describes the availability of the ACTLR, AIFSR, and ADFSR registers, which are only of use to 32-bit guest OSs, and have IMPLEMENTATION DEFINED contents. Given the nature of these registers it is likely that KVM will need to trap accesses regardless of whether the CPUs are heterogeneous. This patch masks out the ID_MMFR0.AuxReg value from the sanity checks, preventing spurious warnings at boot time. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reported-by: Andre Przywara <andre.przywara@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpuinfo.c')
-rw-r--r--arch/arm64/kernel/cpuinfo.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 16d6d032ecf1..01994d4ce0c2 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -144,7 +144,12 @@ static void cpuinfo_sanity_check(struct cpuinfo_arm64 *cur)
144 diff |= CHECK(id_isar3, boot, cur, cpu); 144 diff |= CHECK(id_isar3, boot, cur, cpu);
145 diff |= CHECK(id_isar4, boot, cur, cpu); 145 diff |= CHECK(id_isar4, boot, cur, cpu);
146 diff |= CHECK(id_isar5, boot, cur, cpu); 146 diff |= CHECK(id_isar5, boot, cur, cpu);
147 diff |= CHECK(id_mmfr0, boot, cur, cpu); 147 /*
148 * Regardless of the value of the AuxReg field, the AIFSR, ADFSR, and
149 * ACTLR formats could differ across CPUs and therefore would have to
150 * be trapped for virtualization anyway.
151 */
152 diff |= CHECK_MASK(id_mmfr0, 0xff0fffff, boot, cur, cpu);
148 diff |= CHECK(id_mmfr1, boot, cur, cpu); 153 diff |= CHECK(id_mmfr1, boot, cur, cpu);
149 diff |= CHECK(id_mmfr2, boot, cur, cpu); 154 diff |= CHECK(id_mmfr2, boot, cur, cpu);
150 diff |= CHECK(id_mmfr3, boot, cur, cpu); 155 diff |= CHECK(id_mmfr3, boot, cur, cpu);