diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-11 21:03:54 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-11 21:03:54 -0500 |
commit | 6b00f7efb5303418c231994c91fb8239f5ada260 (patch) | |
tree | 1daba87ccda34e632ea39dedc5055391c7e94bdc /arch/arm64/include/asm/kvm_arm.h | |
parent | b3d6524ff7956c5a898d51a18eaecb62a60a2b84 (diff) | |
parent | d476d94f180af3f0fca77394651d4a98f4df1c54 (diff) |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas:
"arm64 updates for 3.20:
- reimplementation of the virtual remapping of UEFI Runtime Services
in a way that is stable across kexec
- emulation of the "setend" instruction for 32-bit tasks (user
endianness switching trapped in the kernel, SCTLR_EL1.E0E bit set
accordingly)
- compat_sys_call_table implemented in C (from asm) and made it a
constant array together with sys_call_table
- export CPU cache information via /sys (like other architectures)
- DMA API implementation clean-up in preparation for IOMMU support
- macros clean-up for KVM
- dropped some unnecessary cache+tlb maintenance
- CONFIG_ARM64_CPU_SUSPEND clean-up
- defconfig update (CPU_IDLE)
The EFI changes going via the arm64 tree have been acked by Matt
Fleming. There is also a patch adding sys_*stat64 prototypes to
include/linux/syscalls.h, acked by Andrew Morton"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (47 commits)
arm64: compat: Remove incorrect comment in compat_siginfo
arm64: Fix section mismatch on alloc_init_p[mu]d()
arm64: Avoid breakage caused by .altmacro in fpsimd save/restore macros
arm64: mm: use *_sect to check for section maps
arm64: drop unnecessary cache+tlb maintenance
arm64:mm: free the useless initial page table
arm64: Enable CPU_IDLE in defconfig
arm64: kernel: remove ARM64_CPU_SUSPEND config option
arm64: make sys_call_table const
arm64: Remove asm/syscalls.h
arm64: Implement the compat_sys_call_table in C
syscalls: Declare sys_*stat64 prototypes if __ARCH_WANT_(COMPAT_)STAT64
compat: Declare compat_sys_sigpending and compat_sys_sigprocmask prototypes
arm64: uapi: expose our struct ucontext to the uapi headers
smp, ARM64: Kill SMP single function call interrupt
arm64: Emulate SETEND for AArch32 tasks
arm64: Consolidate hotplug notifier for instruction emulation
arm64: Track system support for mixed endian EL0
arm64: implement generic IOMMU configuration
arm64: Combine coherent and non-coherent swiotlb dma_ops
...
Diffstat (limited to 'arch/arm64/include/asm/kvm_arm.h')
-rw-r--r-- | arch/arm64/include/asm/kvm_arm.h | 73 |
1 files changed, 4 insertions, 69 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 8afb863f5a9e..94674eb7e7bb 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #ifndef __ARM64_KVM_ARM_H__ | 18 | #ifndef __ARM64_KVM_ARM_H__ |
19 | #define __ARM64_KVM_ARM_H__ | 19 | #define __ARM64_KVM_ARM_H__ |
20 | 20 | ||
21 | #include <asm/esr.h> | ||
21 | #include <asm/memory.h> | 22 | #include <asm/memory.h> |
22 | #include <asm/types.h> | 23 | #include <asm/types.h> |
23 | 24 | ||
@@ -184,77 +185,11 @@ | |||
184 | #define MDCR_EL2_TPMCR (1 << 5) | 185 | #define MDCR_EL2_TPMCR (1 << 5) |
185 | #define MDCR_EL2_HPMN_MASK (0x1F) | 186 | #define MDCR_EL2_HPMN_MASK (0x1F) |
186 | 187 | ||
187 | /* Exception Syndrome Register (ESR) bits */ | 188 | /* For compatibility with fault code shared with 32-bit */ |
188 | #define ESR_EL2_EC_SHIFT (26) | 189 | #define FSC_FAULT ESR_ELx_FSC_FAULT |
189 | #define ESR_EL2_EC (UL(0x3f) << ESR_EL2_EC_SHIFT) | 190 | #define FSC_PERM ESR_ELx_FSC_PERM |
190 | #define ESR_EL2_IL (UL(1) << 25) | ||
191 | #define ESR_EL2_ISS (ESR_EL2_IL - 1) | ||
192 | #define ESR_EL2_ISV_SHIFT (24) | ||
193 | #define ESR_EL2_ISV (UL(1) << ESR_EL2_ISV_SHIFT) | ||
194 | #define ESR_EL2_SAS_SHIFT (22) | ||
195 | #define ESR_EL2_SAS (UL(3) << ESR_EL2_SAS_SHIFT) | ||
196 | #define ESR_EL2_SSE (1 << 21) | ||
197 | #define ESR_EL2_SRT_SHIFT (16) | ||
198 | #define ESR_EL2_SRT_MASK (0x1f << ESR_EL2_SRT_SHIFT) | ||
199 | #define ESR_EL2_SF (1 << 15) | ||
200 | #define ESR_EL2_AR (1 << 14) | ||
201 | #define ESR_EL2_EA (1 << 9) | ||
202 | #define ESR_EL2_CM (1 << 8) | ||
203 | #define ESR_EL2_S1PTW (1 << 7) | ||
204 | #define ESR_EL2_WNR (1 << 6) | ||
205 | #define ESR_EL2_FSC (0x3f) | ||
206 | #define ESR_EL2_FSC_TYPE (0x3c) | ||
207 | |||
208 | #define ESR_EL2_CV_SHIFT (24) | ||
209 | #define ESR_EL2_CV (UL(1) << ESR_EL2_CV_SHIFT) | ||
210 | #define ESR_EL2_COND_SHIFT (20) | ||
211 | #define ESR_EL2_COND (UL(0xf) << ESR_EL2_COND_SHIFT) | ||
212 | |||
213 | |||
214 | #define FSC_FAULT (0x04) | ||
215 | #define FSC_PERM (0x0c) | ||
216 | 191 | ||
217 | /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ | 192 | /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ |
218 | #define HPFAR_MASK (~UL(0xf)) | 193 | #define HPFAR_MASK (~UL(0xf)) |
219 | 194 | ||
220 | #define ESR_EL2_EC_UNKNOWN (0x00) | ||
221 | #define ESR_EL2_EC_WFI (0x01) | ||
222 | #define ESR_EL2_EC_CP15_32 (0x03) | ||
223 | #define ESR_EL2_EC_CP15_64 (0x04) | ||
224 | #define ESR_EL2_EC_CP14_MR (0x05) | ||
225 | #define ESR_EL2_EC_CP14_LS (0x06) | ||
226 | #define ESR_EL2_EC_FP_ASIMD (0x07) | ||
227 | #define ESR_EL2_EC_CP10_ID (0x08) | ||
228 | #define ESR_EL2_EC_CP14_64 (0x0C) | ||
229 | #define ESR_EL2_EC_ILL_ISS (0x0E) | ||
230 | #define ESR_EL2_EC_SVC32 (0x11) | ||
231 | #define ESR_EL2_EC_HVC32 (0x12) | ||
232 | #define ESR_EL2_EC_SMC32 (0x13) | ||
233 | #define ESR_EL2_EC_SVC64 (0x15) | ||
234 | #define ESR_EL2_EC_HVC64 (0x16) | ||
235 | #define ESR_EL2_EC_SMC64 (0x17) | ||
236 | #define ESR_EL2_EC_SYS64 (0x18) | ||
237 | #define ESR_EL2_EC_IABT (0x20) | ||
238 | #define ESR_EL2_EC_IABT_HYP (0x21) | ||
239 | #define ESR_EL2_EC_PC_ALIGN (0x22) | ||
240 | #define ESR_EL2_EC_DABT (0x24) | ||
241 | #define ESR_EL2_EC_DABT_HYP (0x25) | ||
242 | #define ESR_EL2_EC_SP_ALIGN (0x26) | ||
243 | #define ESR_EL2_EC_FP_EXC32 (0x28) | ||
244 | #define ESR_EL2_EC_FP_EXC64 (0x2C) | ||
245 | #define ESR_EL2_EC_SERROR (0x2F) | ||
246 | #define ESR_EL2_EC_BREAKPT (0x30) | ||
247 | #define ESR_EL2_EC_BREAKPT_HYP (0x31) | ||
248 | #define ESR_EL2_EC_SOFTSTP (0x32) | ||
249 | #define ESR_EL2_EC_SOFTSTP_HYP (0x33) | ||
250 | #define ESR_EL2_EC_WATCHPT (0x34) | ||
251 | #define ESR_EL2_EC_WATCHPT_HYP (0x35) | ||
252 | #define ESR_EL2_EC_BKPT32 (0x38) | ||
253 | #define ESR_EL2_EC_VECTOR32 (0x3A) | ||
254 | #define ESR_EL2_EC_BRK64 (0x3C) | ||
255 | |||
256 | #define ESR_EL2_EC_xABT_xFSR_EXTABT 0x10 | ||
257 | |||
258 | #define ESR_EL2_EC_WFI_ISS_WFE (1 << 0) | ||
259 | |||
260 | #endif /* __ARM64_KVM_ARM_H__ */ | 195 | #endif /* __ARM64_KVM_ARM_H__ */ |