diff options
author | Will Deacon <will.deacon@arm.com> | 2014-07-10 07:40:09 -0400 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-18 05:21:17 -0400 |
commit | 5959e25729a521097856d71528504deda1e11584 (patch) | |
tree | ce4fc3bb9d6b573450ea8c947d94d49eaeb6dad3 /arch/arm64/include/asm/fpsimdmacros.h | |
parent | ad789ba5f7086138461420d2156478d33fb61077 (diff) |
arm64: fpsimd: avoid restoring fpcr if the contents haven't changed
Writing to the FPCR is commonly implemented as a self-synchronising
operation in the CPU, so avoid writing to the register when the saved
value matches that in the hardware already.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/fpsimdmacros.h')
-rw-r--r-- | arch/arm64/include/asm/fpsimdmacros.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 768414d55e64..007618b8188c 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h | |||
@@ -40,6 +40,19 @@ | |||
40 | str w\tmpnr, [\state, #16 * 2 + 4] | 40 | str w\tmpnr, [\state, #16 * 2 + 4] |
41 | .endm | 41 | .endm |
42 | 42 | ||
43 | .macro fpsimd_restore_fpcr state, tmp | ||
44 | /* | ||
45 | * Writes to fpcr may be self-synchronising, so avoid restoring | ||
46 | * the register if it hasn't changed. | ||
47 | */ | ||
48 | mrs \tmp, fpcr | ||
49 | cmp \tmp, \state | ||
50 | b.eq 9999f | ||
51 | msr fpcr, \state | ||
52 | 9999: | ||
53 | .endm | ||
54 | |||
55 | /* Clobbers \state */ | ||
43 | .macro fpsimd_restore state, tmpnr | 56 | .macro fpsimd_restore state, tmpnr |
44 | ldp q0, q1, [\state, #16 * 0] | 57 | ldp q0, q1, [\state, #16 * 0] |
45 | ldp q2, q3, [\state, #16 * 2] | 58 | ldp q2, q3, [\state, #16 * 2] |
@@ -60,7 +73,7 @@ | |||
60 | ldr w\tmpnr, [\state, #16 * 2] | 73 | ldr w\tmpnr, [\state, #16 * 2] |
61 | msr fpsr, x\tmpnr | 74 | msr fpsr, x\tmpnr |
62 | ldr w\tmpnr, [\state, #16 * 2 + 4] | 75 | ldr w\tmpnr, [\state, #16 * 2 + 4] |
63 | msr fpcr, x\tmpnr | 76 | fpsimd_restore_fpcr x\tmpnr, \state |
64 | .endm | 77 | .endm |
65 | 78 | ||
66 | .altmacro | 79 | .altmacro |
@@ -84,7 +97,7 @@ | |||
84 | .macro fpsimd_restore_partial state, tmpnr1, tmpnr2 | 97 | .macro fpsimd_restore_partial state, tmpnr1, tmpnr2 |
85 | ldp w\tmpnr1, w\tmpnr2, [\state] | 98 | ldp w\tmpnr1, w\tmpnr2, [\state] |
86 | msr fpsr, x\tmpnr1 | 99 | msr fpsr, x\tmpnr1 |
87 | msr fpcr, x\tmpnr2 | 100 | fpsimd_restore_fpcr x\tmpnr2, x\tmpnr1 |
88 | adr x\tmpnr1, 0f | 101 | adr x\tmpnr1, 0f |
89 | ldr w\tmpnr2, [\state, #8] | 102 | ldr w\tmpnr2, [\state, #8] |
90 | add \state, \state, x\tmpnr2, lsl #4 | 103 | add \state, \state, x\tmpnr2, lsl #4 |