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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-16 14:58:29 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-16 14:58:29 -0400 |
commit | 714d8e7e27197dd39b2550e762a6a6fcf397a471 (patch) | |
tree | bc989a2a0e14f21912943e56d0002a26a2b7793e /arch/arm64/Kconfig | |
parent | d19d5efd8c8840aa4f38a6dfbfe500d8cc27de46 (diff) | |
parent | 6d1966dfd6e0ad2f8aa4b664ae1a62e33abe1998 (diff) |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon:
"Here are the core arm64 updates for 4.1.
Highlights include a significant rework to head.S (allowing us to boot
on machines with physical memory at a really high address), an AES
performance boost on Cortex-A57 and the ability to run a 32-bit
userspace with 64k pages (although this requires said userspace to be
built with a recent binutils).
The head.S rework spilt over into KVM, so there are some changes under
arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer).
In particular, the linker script changes caused us some issues in
-next, so there are a few merge commits where we had to apply fixes on
top of a stable branch.
Other changes include:
- AES performance boost for Cortex-A57
- AArch32 (compat) userspace with 64k pages
- Cortex-A53 erratum workaround for #845719
- defconfig updates (new platforms, PCI, ...)"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits)
arm64: fix midr range for Cortex-A57 erratum 832075
arm64: errata: add workaround for cortex-a53 erratum #845719
arm64: Use bool function return values of true/false not 1/0
arm64: defconfig: updates for 4.1
arm64: Extract feature parsing code from cpu_errata.c
arm64: alternative: Allow immediate branch as alternative instruction
arm64: insn: Add aarch64_insn_decode_immediate
ARM: kvm: round HYP section to page size instead of log2 upper bound
ARM: kvm: assert on HYP section boundaries not actual code size
arm64: head.S: ensure idmap_t0sz is visible
arm64: pmu: add support for interrupt-affinity property
dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity
arm64: head.S: ensure visibility of page tables
arm64: KVM: use ID map with increased VA range if required
arm64: mm: increase VA range of identity map
ARM: kvm: implement replacement for ld's LOG2CEIL()
arm64: proc: remove unused cpu_get_pgd macro
arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol
arm64: remove __calc_phys_offset
arm64: merge __enable_mmu and __turn_mmu_on
...
Diffstat (limited to 'arch/arm64/Kconfig')
-rw-r--r-- | arch/arm64/Kconfig | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 34f487d5d84e..b8d96f1554af 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig | |||
@@ -368,6 +368,27 @@ config ARM64_ERRATUM_832075 | |||
368 | 368 | ||
369 | If unsure, say Y. | 369 | If unsure, say Y. |
370 | 370 | ||
371 | config ARM64_ERRATUM_845719 | ||
372 | bool "Cortex-A53: 845719: a load might read incorrect data" | ||
373 | depends on COMPAT | ||
374 | default y | ||
375 | help | ||
376 | This option adds an alternative code sequence to work around ARM | ||
377 | erratum 845719 on Cortex-A53 parts up to r0p4. | ||
378 | |||
379 | When running a compat (AArch32) userspace on an affected Cortex-A53 | ||
380 | part, a load at EL0 from a virtual address that matches the bottom 32 | ||
381 | bits of the virtual address used by a recent load at (AArch64) EL1 | ||
382 | might return incorrect data. | ||
383 | |||
384 | The workaround is to write the contextidr_el1 register on exception | ||
385 | return to a 32-bit task. | ||
386 | Please note that this does not necessarily enable the workaround, | ||
387 | as it depends on the alternative framework, which will only patch | ||
388 | the kernel if an affected CPU is detected. | ||
389 | |||
390 | If unsure, say Y. | ||
391 | |||
371 | endmenu | 392 | endmenu |
372 | 393 | ||
373 | 394 | ||
@@ -455,8 +476,8 @@ config SCHED_SMT | |||
455 | places. If unsure say N here. | 476 | places. If unsure say N here. |
456 | 477 | ||
457 | config NR_CPUS | 478 | config NR_CPUS |
458 | int "Maximum number of CPUs (2-64)" | 479 | int "Maximum number of CPUs (2-4096)" |
459 | range 2 64 | 480 | range 2 4096 |
460 | depends on SMP | 481 | depends on SMP |
461 | # These have to remain sorted largest to smallest | 482 | # These have to remain sorted largest to smallest |
462 | default "64" | 483 | default "64" |
@@ -470,6 +491,10 @@ config HOTPLUG_CPU | |||
470 | 491 | ||
471 | source kernel/Kconfig.preempt | 492 | source kernel/Kconfig.preempt |
472 | 493 | ||
494 | config UP_LATE_INIT | ||
495 | def_bool y | ||
496 | depends on !SMP | ||
497 | |||
473 | config HZ | 498 | config HZ |
474 | int | 499 | int |
475 | default 100 | 500 | default 100 |
@@ -670,7 +695,7 @@ source "fs/Kconfig.binfmt" | |||
670 | 695 | ||
671 | config COMPAT | 696 | config COMPAT |
672 | bool "Kernel support for 32-bit EL0" | 697 | bool "Kernel support for 32-bit EL0" |
673 | depends on !ARM64_64K_PAGES | 698 | depends on !ARM64_64K_PAGES || EXPERT |
674 | select COMPAT_BINFMT_ELF | 699 | select COMPAT_BINFMT_ELF |
675 | select HAVE_UID16 | 700 | select HAVE_UID16 |
676 | select OLD_SIGSUSPEND3 | 701 | select OLD_SIGSUSPEND3 |
@@ -681,6 +706,10 @@ config COMPAT | |||
681 | the user helper functions, VFP support and the ptrace interface are | 706 | the user helper functions, VFP support and the ptrace interface are |
682 | handled appropriately by the kernel. | 707 | handled appropriately by the kernel. |
683 | 708 | ||
709 | If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you | ||
710 | will only be able to execute AArch32 binaries that were compiled with | ||
711 | 64k aligned segments. | ||
712 | |||
684 | If you want to execute 32-bit userspace applications, say Y. | 713 | If you want to execute 32-bit userspace applications, say Y. |
685 | 714 | ||
686 | config SYSVIPC_COMPAT | 715 | config SYSVIPC_COMPAT |