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authorShiraz Hashim <shiraz.hashim@st.com>2011-02-16 01:40:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-09 04:49:44 -0500
commit5c881d9ae9480171f01921585e1893863d7ab421 (patch)
tree1f25afe829901e5cfc79d21d4b99b005b1e8b69c /arch/arm/plat-spear
parent53688c51e412b7fd642e5c8eb8ba8ee19744c4ea (diff)
ARM: 6737/1: SPEAr: formalized timer support
Move platform specific timer initialization code is moved into platform specific files. Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Stanley Miao <stanley.miao@windriver.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-spear')
-rw-r--r--arch/arm/plat-spear/time.c21
1 files changed, 8 insertions, 13 deletions
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 839c88df9994..100672fa48e1 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/plat-spear/time.c 2 * arch/arm/plat-spear/time.c
3 * 3 *
4 * Copyright (C) 2009 ST Microelectronics 4 * Copyright (C) 2010 ST Microelectronics
5 * Shiraz Hashim<shiraz.hashim@st.com> 5 * Shiraz Hashim<shiraz.hashim@st.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
@@ -211,7 +211,7 @@ static void __init spear_clockevent_init(void)
211 211
212void __init spear_setup_timer(void) 212void __init spear_setup_timer(void)
213{ 213{
214 struct clk *pll3_clk; 214 int ret;
215 215
216 if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) { 216 if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) {
217 pr_err("%s:cannot get IO addr\n", __func__); 217 pr_err("%s:cannot get IO addr\n", __func__);
@@ -230,26 +230,21 @@ void __init spear_setup_timer(void)
230 goto err_iomap; 230 goto err_iomap;
231 } 231 }
232 232
233 pll3_clk = clk_get(NULL, "pll3_48m_clk"); 233 ret = clk_enable(gpt_clk);
234 if (!pll3_clk) { 234 if (ret < 0) {
235 pr_err("%s:couldn't get PLL3 as parent for gpt\n", __func__); 235 pr_err("%s:couldn't enable gpt clock\n", __func__);
236 goto err_iomap; 236 goto err_clk;
237 } 237 }
238 238
239 clk_set_parent(gpt_clk, pll3_clk);
240
241 spear_clockevent_init(); 239 spear_clockevent_init();
242 spear_clocksource_init(); 240 spear_clocksource_init();
243 241
244 return; 242 return;
245 243
244err_clk:
245 clk_put(gpt_clk);
246err_iomap: 246err_iomap:
247 iounmap(gpt_base); 247 iounmap(gpt_base);
248
249err_mem: 248err_mem:
250 release_mem_region(SPEAR_GPT0_BASE, SZ_1K); 249 release_mem_region(SPEAR_GPT0_BASE, SZ_1K);
251} 250}
252
253struct sys_timer spear_sys_timer = {
254 .init = spear_setup_timer,
255};