diff options
author | Linus Walleij <linus.walleij@stericsson.com> | 2010-07-19 15:55:46 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-22 04:23:27 -0400 |
commit | 4bd48940190a34fe5a78a1595ec7756edf36b18a (patch) | |
tree | ab59d7b63b5dfa7c4838aefb102e8c946f2458ca /arch/arm/plat-spear | |
parent | cd5b8f8755a89a57fc8c408d284b8b613f090345 (diff) |
ARM: 6234/1: move SPEAr to use common mult/shift calculation code
Since the infrastructure for determining shift/mult values from a
clock rate and a minimum programmable rate is now in the kernel,
lets remove this custom code.
Cc: Viresh KUMAR <viresh.kumar@st.com>
Tested-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-spear')
-rw-r--r-- | arch/arm/plat-spear/time.c | 47 |
1 files changed, 7 insertions, 40 deletions
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index a1025d38f383..ab211652e4ca 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c | |||
@@ -58,6 +58,11 @@ | |||
58 | 58 | ||
59 | #define INT_STATUS 0x1 | 59 | #define INT_STATUS 0x1 |
60 | 60 | ||
61 | /* | ||
62 | * Minimum clocksource/clockevent timer range in seconds | ||
63 | */ | ||
64 | #define SPEAR_MIN_RANGE 4 | ||
65 | |||
61 | static __iomem void *gpt_base; | 66 | static __iomem void *gpt_base; |
62 | static struct clk *gpt_clk; | 67 | static struct clk *gpt_clk; |
63 | 68 | ||
@@ -66,44 +71,6 @@ static void clockevent_set_mode(enum clock_event_mode mode, | |||
66 | static int clockevent_next_event(unsigned long evt, | 71 | static int clockevent_next_event(unsigned long evt, |
67 | struct clock_event_device *clk_event_dev); | 72 | struct clock_event_device *clk_event_dev); |
68 | 73 | ||
69 | /* | ||
70 | * Following clocksource_set_clock and clockevent_set_clock picked | ||
71 | * from arch/mips/kernel/time.c | ||
72 | */ | ||
73 | |||
74 | void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock) | ||
75 | { | ||
76 | u64 temp; | ||
77 | u32 shift; | ||
78 | |||
79 | /* Find a shift value */ | ||
80 | for (shift = 32; shift > 0; shift--) { | ||
81 | temp = (u64) NSEC_PER_SEC << shift; | ||
82 | do_div(temp, clock); | ||
83 | if ((temp >> 32) == 0) | ||
84 | break; | ||
85 | } | ||
86 | cs->shift = shift; | ||
87 | cs->mult = (u32) temp; | ||
88 | } | ||
89 | |||
90 | void __init clockevent_set_clock(struct clock_event_device *cd, | ||
91 | unsigned int clock) | ||
92 | { | ||
93 | u64 temp; | ||
94 | u32 shift; | ||
95 | |||
96 | /* Find a shift value */ | ||
97 | for (shift = 32; shift > 0; shift--) { | ||
98 | temp = (u64) clock << shift; | ||
99 | do_div(temp, NSEC_PER_SEC); | ||
100 | if ((temp >> 32) == 0) | ||
101 | break; | ||
102 | } | ||
103 | cd->shift = shift; | ||
104 | cd->mult = (u32) temp; | ||
105 | } | ||
106 | |||
107 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 74 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
108 | { | 75 | { |
109 | return (cycle_t) readw(gpt_base + COUNT(CLKSRC)); | 76 | return (cycle_t) readw(gpt_base + COUNT(CLKSRC)); |
@@ -138,7 +105,7 @@ static void spear_clocksource_init(void) | |||
138 | val |= CTRL_ENABLE ; | 105 | val |= CTRL_ENABLE ; |
139 | writew(val, gpt_base + CR(CLKSRC)); | 106 | writew(val, gpt_base + CR(CLKSRC)); |
140 | 107 | ||
141 | clocksource_set_clock(&clksrc, tick_rate); | 108 | clocksource_calc_mult_shift(&clksrc, tick_rate, SPEAR_MIN_RANGE); |
142 | 109 | ||
143 | /* register the clocksource */ | 110 | /* register the clocksource */ |
144 | clocksource_register(&clksrc); | 111 | clocksource_register(&clksrc); |
@@ -233,7 +200,7 @@ static void __init spear_clockevent_init(void) | |||
233 | tick_rate = clk_get_rate(gpt_clk); | 200 | tick_rate = clk_get_rate(gpt_clk); |
234 | tick_rate >>= CTRL_PRESCALER16; | 201 | tick_rate >>= CTRL_PRESCALER16; |
235 | 202 | ||
236 | clockevent_set_clock(&clkevt, tick_rate); | 203 | clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE); |
237 | 204 | ||
238 | clkevt.max_delta_ns = clockevent_delta2ns(0xfff0, | 205 | clkevt.max_delta_ns = clockevent_delta2ns(0xfff0, |
239 | &clkevt); | 206 | &clkevt); |