ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll

The fout clock of BPLL and MPLL have a selectable source on EXYNOS5250.
The clock options are a fixed divided by 2 clock and the output of the
PLL itself. Add support for these new clock instances.

Signed-off-by: Kisoo Yu <ksoo.yu@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: moved common pll stuff into s5p-clock.c]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c
index 41d3dfd5dddb..031a61899bef 100644
--- a/arch/arm/plat-samsung/s5p-clock.c
+++ b/arch/arm/plat-samsung/s5p-clock.c
@@ -67,6 +67,11 @@ struct clk clk_fout_bpll = {
         .id             = -1,
 };
 
+struct clk clk_fout_bpll_div2 = {
+        .name           = "fout_bpll_div2",
+        .id             = -1,
+};
+
 /* CPLL clock output */
 
 struct clk clk_fout_cpll = {
@@ -82,6 +87,11 @@ struct clk clk_fout_mpll = {
         .id             = -1,
 };
 
+struct clk clk_fout_mpll_div2 = {
+        .name           = "fout_mpll_div2",
+        .id             = -1,
+};
+
 /* EPLL clock output */
 struct clk clk_fout_epll = {
         .name           = "fout_epll",
@@ -125,6 +135,16 @@ struct clksrc_sources clk_src_bpll = {
         .nr_sources     = ARRAY_SIZE(clk_src_bpll_list),
 };
 
+static struct clk *clk_src_bpll_fout_list[] = {
+        [0] = &clk_fout_bpll_div2,
+        [1] = &clk_fout_bpll,
+};
+
+struct clksrc_sources clk_src_bpll_fout = {
+        .sources        = clk_src_bpll_fout_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_bpll_fout_list),
+};
+
 /* Possible clock sources for CPLL Mux */
 static struct clk *clk_src_cpll_list[] = {
         [0] = &clk_fin_cpll,
@@ -147,6 +167,16 @@ struct clksrc_sources clk_src_mpll = {
         .nr_sources     = ARRAY_SIZE(clk_src_mpll_list),
 };
 
+static struct clk *clk_src_mpll_fout_list[] = {
+        [0] = &clk_fout_mpll_div2,
+        [1] = &clk_fout_mpll,
+};
+
+struct clksrc_sources clk_src_mpll_fout = {
+        .sources        = clk_src_mpll_fout_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_mpll_fout_list),
+};
+
 /* Possible clock sources for EPLL Mux */
 static struct clk *clk_src_epll_list[] = {
         [0] = &clk_fin_epll,