diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-12-03 06:28:21 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-29 19:36:52 -0500 |
commit | 27b31e56239b44608cad176c36c384c0265f8da5 (patch) | |
tree | 4bfd3ab70d1df1964c70b45ab32868bd9938b9b7 /arch/arm/plat-samsung/irq-uart.c | |
parent | 3c9169753b42c34c9c5ed96a0e55f417a2f65d77 (diff) |
ARM: SAMSUNG: Convert irq-uart to use new irq_ functions
Convert to the new irq_ versions of the IRQ operations. As well as
the textual substituion of irq_data for the raw IRQ number we also
convert the register base lookup to in s3c_irq_uart_base() to pick
the irq_data up directly.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/irq-uart.c')
-rw-r--r-- | arch/arm/plat-samsung/irq-uart.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 4f8c102674ae..da31d785cbd1 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c | |||
@@ -28,9 +28,9 @@ | |||
28 | * are consecutive when looking up the interrupt in the demux routines. | 28 | * are consecutive when looking up the interrupt in the demux routines. |
29 | */ | 29 | */ |
30 | 30 | ||
31 | static inline void __iomem *s3c_irq_uart_base(unsigned int irq) | 31 | static inline void __iomem *s3c_irq_uart_base(struct irq_data *data) |
32 | { | 32 | { |
33 | struct s3c_uart_irq *uirq = get_irq_chip_data(irq); | 33 | struct s3c_uart_irq *uirq = data->chip_data; |
34 | return uirq->regs; | 34 | return uirq->regs; |
35 | } | 35 | } |
36 | 36 | ||
@@ -39,10 +39,10 @@ static inline unsigned int s3c_irq_uart_bit(unsigned int irq) | |||
39 | return irq & 3; | 39 | return irq & 3; |
40 | } | 40 | } |
41 | 41 | ||
42 | static void s3c_irq_uart_mask(unsigned int irq) | 42 | static void s3c_irq_uart_mask(struct irq_data *data) |
43 | { | 43 | { |
44 | void __iomem *regs = s3c_irq_uart_base(irq); | 44 | void __iomem *regs = s3c_irq_uart_base(data); |
45 | unsigned int bit = s3c_irq_uart_bit(irq); | 45 | unsigned int bit = s3c_irq_uart_bit(data->irq); |
46 | u32 reg; | 46 | u32 reg; |
47 | 47 | ||
48 | reg = __raw_readl(regs + S3C64XX_UINTM); | 48 | reg = __raw_readl(regs + S3C64XX_UINTM); |
@@ -50,10 +50,10 @@ static void s3c_irq_uart_mask(unsigned int irq) | |||
50 | __raw_writel(reg, regs + S3C64XX_UINTM); | 50 | __raw_writel(reg, regs + S3C64XX_UINTM); |
51 | } | 51 | } |
52 | 52 | ||
53 | static void s3c_irq_uart_maskack(unsigned int irq) | 53 | static void s3c_irq_uart_maskack(struct irq_data *data) |
54 | { | 54 | { |
55 | void __iomem *regs = s3c_irq_uart_base(irq); | 55 | void __iomem *regs = s3c_irq_uart_base(data); |
56 | unsigned int bit = s3c_irq_uart_bit(irq); | 56 | unsigned int bit = s3c_irq_uart_bit(data->irq); |
57 | u32 reg; | 57 | u32 reg; |
58 | 58 | ||
59 | reg = __raw_readl(regs + S3C64XX_UINTM); | 59 | reg = __raw_readl(regs + S3C64XX_UINTM); |
@@ -62,10 +62,10 @@ static void s3c_irq_uart_maskack(unsigned int irq) | |||
62 | __raw_writel(1 << bit, regs + S3C64XX_UINTP); | 62 | __raw_writel(1 << bit, regs + S3C64XX_UINTP); |
63 | } | 63 | } |
64 | 64 | ||
65 | static void s3c_irq_uart_unmask(unsigned int irq) | 65 | static void s3c_irq_uart_unmask(struct irq_data *data) |
66 | { | 66 | { |
67 | void __iomem *regs = s3c_irq_uart_base(irq); | 67 | void __iomem *regs = s3c_irq_uart_base(data); |
68 | unsigned int bit = s3c_irq_uart_bit(irq); | 68 | unsigned int bit = s3c_irq_uart_bit(data->irq); |
69 | u32 reg; | 69 | u32 reg; |
70 | 70 | ||
71 | reg = __raw_readl(regs + S3C64XX_UINTM); | 71 | reg = __raw_readl(regs + S3C64XX_UINTM); |
@@ -73,10 +73,10 @@ static void s3c_irq_uart_unmask(unsigned int irq) | |||
73 | __raw_writel(reg, regs + S3C64XX_UINTM); | 73 | __raw_writel(reg, regs + S3C64XX_UINTM); |
74 | } | 74 | } |
75 | 75 | ||
76 | static void s3c_irq_uart_ack(unsigned int irq) | 76 | static void s3c_irq_uart_ack(struct irq_data *data) |
77 | { | 77 | { |
78 | void __iomem *regs = s3c_irq_uart_base(irq); | 78 | void __iomem *regs = s3c_irq_uart_base(data); |
79 | unsigned int bit = s3c_irq_uart_bit(irq); | 79 | unsigned int bit = s3c_irq_uart_bit(data->irq); |
80 | 80 | ||
81 | __raw_writel(1 << bit, regs + S3C64XX_UINTP); | 81 | __raw_writel(1 << bit, regs + S3C64XX_UINTP); |
82 | } | 82 | } |
@@ -99,10 +99,10 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc) | |||
99 | 99 | ||
100 | static struct irq_chip s3c_irq_uart = { | 100 | static struct irq_chip s3c_irq_uart = { |
101 | .name = "s3c-uart", | 101 | .name = "s3c-uart", |
102 | .mask = s3c_irq_uart_mask, | 102 | .irq_mask = s3c_irq_uart_mask, |
103 | .unmask = s3c_irq_uart_unmask, | 103 | .irq_unmask = s3c_irq_uart_unmask, |
104 | .mask_ack = s3c_irq_uart_maskack, | 104 | .irq_mask_ack = s3c_irq_uart_maskack, |
105 | .ack = s3c_irq_uart_ack, | 105 | .irq_ack = s3c_irq_uart_ack, |
106 | }; | 106 | }; |
107 | 107 | ||
108 | static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) | 108 | static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) |