diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
commit | dca1d9f6d7ae428c193f32bd3e9a4ca13176648b (patch) | |
tree | 02de8c3503c1c811754423d2fa3f3b4978044f6e /arch/arm/plat-samsung/include/plat/sdhci.h | |
parent | 9ff99339447de403a46be5e3f23d0c794d540b06 (diff) | |
parent | 91e013827c0bcbb187ecf02213c5446b6f62d445 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
ARM: S3C2443: Remove #if 0 for clk_mpll
ARM: S3C2443: Update notes on MPLLREF clock
ARM: S3C2443: Further clksrc-clk conversions
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
USB: Fix s3c-hsotg build following Samsung platform header moves
ARM: S3C64XX: Reintroduce unconditional build of audio device
ARM: 5961/1: ux500: fix CLKRST addresses
ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
ASoC: Fix S3C64xx IIS driver for Samsung header reorg
ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
[ARM] pxa: fix typo in mxm8x10.h
[ARM] pxa/raumfeld: set GPIO drive bits for LED pins
[ARM] pxa/zeus: Add support for mcp2515 CAN bus
[ARM] pxa/zeus: Add support for onboard max6369 watchdog
[ARM] pxa/zeus: Add Eurotech as the manufacturer
[ARM] pxa/zeus: Correct the USB host initialisation flags
[ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
[ARM] pxa: refactor uncompress.h for non-PXA uarts
[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
...
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/sdhci.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 221 |
1 files changed, 221 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h new file mode 100644 index 000000000000..7d07cd7aa4f2 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -0,0 +1,221 @@ | |||
1 | /* linux/arch/arm/plat-s3c/include/plat/sdhci.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C Platform - SDHCI (HSMMC) platform data definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __PLAT_S3C_SDHCI_H | ||
16 | #define __PLAT_S3C_SDHCI_H __FILE__ | ||
17 | |||
18 | struct platform_device; | ||
19 | struct mmc_host; | ||
20 | struct mmc_card; | ||
21 | struct mmc_ios; | ||
22 | |||
23 | /** | ||
24 | * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI | ||
25 | * @max_width: The maximum number of data bits supported. | ||
26 | * @host_caps: Standard MMC host capabilities bit field. | ||
27 | * @cfg_gpio: Configure the GPIO for a specific card bit-width | ||
28 | * @cfg_card: Configure the interface for a specific card and speed. This | ||
29 | * is necessary the controllers and/or GPIO blocks require the | ||
30 | * changing of driver-strength and other controls dependant on | ||
31 | * the card and speed of operation. | ||
32 | * | ||
33 | * Initialisation data specific to either the machine or the platform | ||
34 | * for the device driver to use or call-back when configuring gpio or | ||
35 | * card speed information. | ||
36 | */ | ||
37 | struct s3c_sdhci_platdata { | ||
38 | unsigned int max_width; | ||
39 | unsigned int host_caps; | ||
40 | |||
41 | char **clocks; /* set of clock sources */ | ||
42 | |||
43 | void (*cfg_gpio)(struct platform_device *dev, int width); | ||
44 | void (*cfg_card)(struct platform_device *dev, | ||
45 | void __iomem *regbase, | ||
46 | struct mmc_ios *ios, | ||
47 | struct mmc_card *card); | ||
48 | }; | ||
49 | |||
50 | /** | ||
51 | * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. | ||
52 | * @pd: Platform data to register to device. | ||
53 | * | ||
54 | * Register the given platform data for use withe S3C SDHCI device. | ||
55 | * The call will copy the platform data, so the board definitions can | ||
56 | * make the structure itself __initdata. | ||
57 | */ | ||
58 | extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); | ||
59 | extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); | ||
60 | extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); | ||
61 | |||
62 | /* Default platform data, exported so that per-cpu initialisation can | ||
63 | * set the correct one when there are more than one cpu type selected. | ||
64 | */ | ||
65 | |||
66 | extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; | ||
67 | extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; | ||
68 | extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; | ||
69 | |||
70 | /* Helper function availablity */ | ||
71 | |||
72 | extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
73 | extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
74 | extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
78 | |||
79 | /* S3C6400 SDHCI setup */ | ||
80 | |||
81 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | ||
82 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
83 | |||
84 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
85 | extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | ||
86 | void __iomem *r, | ||
87 | struct mmc_ios *ios, | ||
88 | struct mmc_card *card); | ||
89 | |||
90 | static inline void s3c6400_default_sdhci0(void) | ||
91 | { | ||
92 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
93 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | ||
94 | s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
95 | } | ||
96 | |||
97 | #else | ||
98 | static inline void s3c6400_default_sdhci0(void) { } | ||
99 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
100 | |||
101 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
102 | static inline void s3c6400_default_sdhci1(void) | ||
103 | { | ||
104 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
105 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | ||
106 | s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
107 | } | ||
108 | #else | ||
109 | static inline void s3c6400_default_sdhci1(void) { } | ||
110 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
111 | |||
112 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
113 | static inline void s3c6400_default_sdhci2(void) | ||
114 | { | ||
115 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
116 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | ||
117 | s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; | ||
118 | } | ||
119 | #else | ||
120 | static inline void s3c6400_default_sdhci2(void) { } | ||
121 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
122 | |||
123 | /* S3C6410 SDHCI setup */ | ||
124 | |||
125 | extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, | ||
126 | void __iomem *r, | ||
127 | struct mmc_ios *ios, | ||
128 | struct mmc_card *card); | ||
129 | |||
130 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
131 | static inline void s3c6410_default_sdhci0(void) | ||
132 | { | ||
133 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
134 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | ||
135 | s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
136 | } | ||
137 | #else | ||
138 | static inline void s3c6410_default_sdhci0(void) { } | ||
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
140 | |||
141 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
142 | static inline void s3c6410_default_sdhci1(void) | ||
143 | { | ||
144 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
145 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | ||
146 | s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
147 | } | ||
148 | #else | ||
149 | static inline void s3c6410_default_sdhci1(void) { } | ||
150 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
151 | |||
152 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
153 | static inline void s3c6410_default_sdhci2(void) | ||
154 | { | ||
155 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
156 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | ||
157 | s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; | ||
158 | } | ||
159 | #else | ||
160 | static inline void s3c6410_default_sdhci2(void) { } | ||
161 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
162 | |||
163 | #else | ||
164 | static inline void s3c6410_default_sdhci0(void) { } | ||
165 | static inline void s3c6410_default_sdhci1(void) { } | ||
166 | static inline void s3c6400_default_sdhci0(void) { } | ||
167 | static inline void s3c6400_default_sdhci1(void) { } | ||
168 | |||
169 | #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ | ||
170 | |||
171 | /* S5PC100 SDHCI setup */ | ||
172 | |||
173 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | ||
174 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
175 | |||
176 | extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, | ||
177 | void __iomem *r, | ||
178 | struct mmc_ios *ios, | ||
179 | struct mmc_card *card); | ||
180 | |||
181 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
182 | static inline void s5pc100_default_sdhci0(void) | ||
183 | { | ||
184 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
185 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | ||
186 | s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
187 | } | ||
188 | #else | ||
189 | static inline void s5pc100_default_sdhci0(void) { } | ||
190 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
191 | |||
192 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
193 | static inline void s5pc100_default_sdhci1(void) | ||
194 | { | ||
195 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | ||
197 | s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
198 | } | ||
199 | #else | ||
200 | static inline void s5pc100_default_sdhci1(void) { } | ||
201 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
202 | |||
203 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
204 | static inline void s5pc100_default_sdhci2(void) | ||
205 | { | ||
206 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
207 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | ||
208 | s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; | ||
209 | } | ||
210 | #else | ||
211 | static inline void s5pc100_default_sdhci2(void) { } | ||
212 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
213 | |||
214 | |||
215 | #else | ||
216 | static inline void s5pc100_default_sdhci0(void) { } | ||
217 | static inline void s5pc100_default_sdhci1(void) { } | ||
218 | static inline void s5pc100_default_sdhci2(void) { } | ||
219 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | ||
220 | |||
221 | #endif /* __PLAT_S3C_SDHCI_H */ | ||