Merge branch 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc

* 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc: (79 commits)
  ARM: SAMSUNG: Move fimc plat. device from board files to plat-samsung
  ARM: SAMSUNG: Cleanup resources by using macro
  ARM: SAMSUNG: Cleanup plat-samsung/devs.c and devs.h
  ARM: S5P: To merge devs.c files to one devs.c
  ARM: S3C64XX: To merge devs.c files to one devs.c
  ARM: S3C24XX: To merge s3c24xx devs.c files to one devs.c
  ARM: S5P64X0: Add Power Management support
  ARM: S5P: Make the sleep code common for S5P series SoCs
  ARM: S5P: Make the common S5P PM code conditionally compile
  ARM: SAMSUNG: Move S5P header files to plat-samsung
  ARM: SAMSUNG: Move S3C24XX header files to plat-samsung
  ARM: SAMSUNG: Moving each SoC support header files
  ARM: SAMSUNG: Consolidate plat/pll.h
  ARM: SAMSUNG: Consolidate plat/pwm-clock.h
  ARM: SAMSUNG: Cleanup mach/clkdev.h
  ARM: SAMSUNG: remove sdhci default configuration setup platform helper
  ARM: EXYNOS4: Add FIMC device on SMDKV310 board
  ARM: EXYNOS4: Add header file protection macros
  ARM: EXYNOS4: Add usb ehci device to the SMDKV310
  ARM: S3C2443: Add hsspi-clock from pclk and rename S3C2443 hsspi sclk
  ...

Fix up conflicts in
 - arch/arm/mach-exynos4/{Kconfig,clock.c}
	ARM_CPU_SUSPEND, various random device tables (gah!)
 - drivers/gpio/Makefile
	sa1100 gpio added, samsung gpio drivers merged

1 files changed, 54 insertions, 0 deletions

diff --git a/arch/arm/plat-samsung/include/plat/regs-srom.h b/arch/arm/plat-samsung/include/plat/regs-srom.h
new file mode 100644
index 000000000000..9b6729c81cda
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/regs-srom.h
@@ -0,0 +1,54 @@
+/* linux/arch/arm/plat-samsung/include/plat/regs-srom.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * S5P SROMC register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __PLAT_SAMSUNG_REGS_SROM_H
+#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_SROMREG(x)          (S5P_VA_SROMC + (x))
+
+#define S5P_SROM_BW             S5P_SROMREG(0x0)
+#define S5P_SROM_BC0            S5P_SROMREG(0x4)
+#define S5P_SROM_BC1            S5P_SROMREG(0x8)
+#define S5P_SROM_BC2            S5P_SROMREG(0xc)
+#define S5P_SROM_BC3            S5P_SROMREG(0x10)
+#define S5P_SROM_BC4            S5P_SROMREG(0x14)
+#define S5P_SROM_BC5            S5P_SROMREG(0x18)
+
+/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
+
+#define S5P_SROM_BW__DATAWIDTH__SHIFT           0
+#define S5P_SROM_BW__ADDRMODE__SHIFT            1
+#define S5P_SROM_BW__WAITENABLE__SHIFT          2
+#define S5P_SROM_BW__BYTEENABLE__SHIFT          3
+
+#define S5P_SROM_BW__CS_MASK                    0xf
+
+#define S5P_SROM_BW__NCS0__SHIFT                0
+#define S5P_SROM_BW__NCS1__SHIFT                4
+#define S5P_SROM_BW__NCS2__SHIFT                8
+#define S5P_SROM_BW__NCS3__SHIFT                12
+#define S5P_SROM_BW__NCS4__SHIFT                16
+#define S5P_SROM_BW__NCS5__SHIFT                20
+
+/* applies to same to BCS0 - BCS3 */
+
+#define S5P_SROM_BCX__PMC__SHIFT                0
+#define S5P_SROM_BCX__TACP__SHIFT               4
+#define S5P_SROM_BCX__TCAH__SHIFT               8
+#define S5P_SROM_BCX__TCOH__SHIFT               12
+#define S5P_SROM_BCX__TACC__SHIFT               16
+#define S5P_SROM_BCX__TCOS__SHIFT               24
+#define S5P_SROM_BCX__TACS__SHIFT               28
+
+#endif /* __PLAT_SAMSUNG_REGS_SROM_H */