ARM: S5P6442: Add IRQ support

This patch adds IRQ support for S5P6442. This patch adds interrupt
register definitions, IRQ definitions for various interrupt sources
and new VIC base for VIC2 in plat-s5p common irq code.

Signed-off-by: Adityapratap Sharma <aditya.ps@samsung.com>
Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

2 files changed, 5 insertions, 0 deletions

diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 101038d49944..9daad19ccd0d 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -28,11 +28,13 @@
 
 #define S5P_VIC0_BASE           S5P_IRQ(0)
 #define S5P_VIC1_BASE           S5P_IRQ(32)
+#define S5P_VIC2_BASE           S5P_IRQ(64)
 
 #define VIC_BASE(x)             (S5P_VIC0_BASE + ((x)*32))
 
 #define IRQ_VIC0_BASE           S5P_VIC0_BASE
 #define IRQ_VIC1_BASE           S5P_VIC1_BASE
+#define IRQ_VIC2_BASE           S5P_VIC2_BASE
 
 /* UART interrupts, each UART has 4 intterupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
@@ -73,6 +75,7 @@
 
 #define S5P_IRQ_VIC0(x)         (S5P_VIC0_BASE + (x))
 #define S5P_IRQ_VIC1(x)         (S5P_VIC1_BASE + (x))
+#define S5P_IRQ_VIC2(x)         (S5P_VIC2_BASE + (x))
 
 #define S5P_TIMER_IRQ(x)        S5P_IRQ(11 + (x))
 
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index 11535a5f534e..25e1eb6de59e 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -45,11 +45,13 @@ static struct s3c_uart_irq uart_irqs[] = {
                 .base_irq       = IRQ_S5P_UART_BASE2,
                 .parent_irq     = IRQ_UART2,
         },
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
         [3] = {
                 .regs           = S5P_VA_UART3,
                 .base_irq       = IRQ_S5P_UART_BASE3,
                 .parent_irq     = IRQ_UART3,
         },
+#endif
 };
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)