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authorKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
commit830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch)
treee72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/plat-s5p
parente700e41d9abfbf9fee01e979a41b185695132c19 (diff)
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r--arch/arm/plat-s5p/Kconfig2
-rw-r--r--arch/arm/plat-s5p/cpu.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index ab16e5568c4c..9b9968fa8695 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
7 7
8config PLAT_S5P 8config PLAT_S5P
9 bool 9 bool
10 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4) 10 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
11 default y 11 default y
12 select ARM_VIC if !ARCH_EXYNOS4 12 select ARM_VIC if !ARCH_EXYNOS4
13 select ARM_GIC if ARCH_EXYNOS4 13 select ARM_GIC if ARCH_EXYNOS4
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 7b0a28f73a68..a56959e83516 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -75,7 +75,7 @@ static struct cpu_table cpu_ids[] __initdata = {
75 .map_io = exynos4_map_io, 75 .map_io = exynos4_map_io,
76 .init_clocks = exynos4_init_clocks, 76 .init_clocks = exynos4_init_clocks,
77 .init_uarts = exynos4_init_uarts, 77 .init_uarts = exynos4_init_uarts,
78 .init = exynos4_init, 78 .init = exynos_init,
79 .name = name_exynos4210, 79 .name = name_exynos4210,
80 }, { 80 }, {
81 .idcode = EXYNOS4212_CPU_ID, 81 .idcode = EXYNOS4212_CPU_ID,
@@ -83,7 +83,7 @@ static struct cpu_table cpu_ids[] __initdata = {
83 .map_io = exynos4_map_io, 83 .map_io = exynos4_map_io,
84 .init_clocks = exynos4_init_clocks, 84 .init_clocks = exynos4_init_clocks,
85 .init_uarts = exynos4_init_uarts, 85 .init_uarts = exynos4_init_uarts,
86 .init = exynos4_init, 86 .init = exynos_init,
87 .name = name_exynos4212, 87 .name = name_exynos4212,
88 }, { 88 }, {
89 .idcode = EXYNOS4412_CPU_ID, 89 .idcode = EXYNOS4412_CPU_ID,
@@ -91,7 +91,7 @@ static struct cpu_table cpu_ids[] __initdata = {
91 .map_io = exynos4_map_io, 91 .map_io = exynos4_map_io,
92 .init_clocks = exynos4_init_clocks, 92 .init_clocks = exynos4_init_clocks,
93 .init_uarts = exynos4_init_uarts, 93 .init_uarts = exynos4_init_uarts,
94 .init = exynos4_init, 94 .init = exynos_init,
95 .name = name_exynos4412, 95 .name = name_exynos4412,
96 }, 96 },
97}; 97};