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authorJ. Bruce Fields <bfields@citi.umich.edu>2009-11-23 12:34:58 -0500
committerJ. Bruce Fields <bfields@citi.umich.edu>2009-11-23 12:34:58 -0500
commit9b8b317d58084b9a44f6f33b355c4278d9f841fb (patch)
treee0df89800bf4301c4017db3cdf04a2056ec1a852 /arch/arm/plat-s3c64xx/s3c6400-clock.c
parent78c210efdefe07131f91ed512a3308b15bb14e2f (diff)
parent648f4e3e50c4793d9dbf9a09afa193631f76fa26 (diff)
Merge commit 'v2.6.32-rc8' into HEAD
Diffstat (limited to 'arch/arm/plat-s3c64xx/s3c6400-clock.c')
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 9745852261e0..6ffa21eb1b91 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -677,6 +677,9 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
677 677
678 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 678 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
679 679
680 /* For now assume the mux always selects the crystal */
681 clk_ext_xtal_mux.parent = xtal_clk;
682
680 epll = s3c6400_get_epll(xtal); 683 epll = s3c6400_get_epll(xtal);
681 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); 684 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
682 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); 685 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));