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authorLinus Torvalds <torvalds@linux-foundation.org>2009-08-07 13:46:51 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-08-07 13:46:51 -0400
commit36b8659f9316b24c514a7c8290596b2382b91dd2 (patch)
treeb5228d0ccbde9600df13873b97eaae1c621e25e3 /arch/arm/plat-s3c64xx/s3c6400-clock.c
parentcba8784ae0a9f7d0f1f87e0607e7ae66fc45666c (diff)
parentc0c60c4b9ab45bb02b20796401dd6a90770fd0ee (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits) ARM: 5639/1: arm: clkdev.c should include <linux/clk.h> ARM: 5638/1: arch/arm/kernel/signal.c: use correct address space for CRUNCH ARM: 5637/1: [KS8695] Don't reference CLOCK_TICK_RATE in drivers ARM: S3C64XX: serial: Fix section mismatch warning ARM: S3C24XX: serial: Fix section mismatch warnings ARM: S3C: PWM fix for low duty cycle ARM: 5597/1: [PCI] reset all internal hardware prior PCI initialization ARM: 5627/1: Fix restoring of lr at the end of mcount ARM: 5624/1: Document cache aliasing region S3C64XX: Fix ARMCLK configuration S3C64XX: Fix get_rate() for ARMCLK S3C24XX: GPIO: Fix pin range check in s3c_gpiolib_getchip mx3 defconfig update mx27 defconfig update ARM: 5623/1: Treo680: ir shutdown typo fix ARM: includecheck fix: plat-stmp3xxx/pinmux.c ARM: includecheck fix: plat-s3c64xx/pm.c ARM: includecheck fix: mach-omap2/mcbsp.c ARM: includecheck fix: mach-omap1/mcbsp.c ARM: includecheck fix: board-sffsdr.c ...
Diffstat (limited to 'arch/arm/plat-s3c64xx/s3c6400-clock.c')
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 1debc1f9f987..febac1950d8e 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -153,7 +153,7 @@ static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
153 u32 div; 153 u32 div;
154 154
155 if (parent < rate) 155 if (parent < rate)
156 return rate; 156 return parent;
157 157
158 div = (parent / rate) - 1; 158 div = (parent / rate) - 1;
159 if (div > armclk_mask) 159 if (div > armclk_mask)
@@ -175,7 +175,7 @@ static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
175 div = clk_get_rate(clk->parent) / rate; 175 div = clk_get_rate(clk->parent) / rate;
176 176
177 val = __raw_readl(S3C_CLK_DIV0); 177 val = __raw_readl(S3C_CLK_DIV0);
178 val &= armclk_mask; 178 val &= ~armclk_mask;
179 val |= (div - 1); 179 val |= (div - 1);
180 __raw_writel(val, S3C_CLK_DIV0); 180 __raw_writel(val, S3C_CLK_DIV0);
181 181