[ARM] S3C64XX: Map timer memory and interrupts

Add the physical to virtual memory mapping and the
necessary interrupt demuxing for the PWM timer blocks.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

1 files changed, 14 insertions, 6 deletions

diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 3564dfbec85a..8bdfb27425e6 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -89,12 +89,12 @@
 #define IRQ_ARM_DMA             S3C64XX_IRQ_VIC0(20)
 #define IRQ_ARM_DMAS            S3C64XX_IRQ_VIC0(21)
 #define IRQ_KEYPAD              S3C64XX_IRQ_VIC0(22)
-#define IRQ_TIMER0              S3C64XX_IRQ_VIC0(23)
-#define IRQ_TIMER1              S3C64XX_IRQ_VIC0(24)
-#define IRQ_TIMER2              S3C64XX_IRQ_VIC0(25)
+#define IRQ_TIMER0_VIC          S3C64XX_IRQ_VIC0(23)
+#define IRQ_TIMER1_VIC          S3C64XX_IRQ_VIC0(24)
+#define IRQ_TIMER2_VIC          S3C64XX_IRQ_VIC0(25)
 #define IRQ_WDT                 S3C64XX_IRQ_VIC0(26)
-#define IRQ_TIMER3              S3C64XX_IRQ_VIC0(27)
-#define IRQ_TIMER4              S3C64XX_IRQ_VIC0(28)
+#define IRQ_TIMER3_VIC          S3C64XX_IRQ_VIC0(27)
+#define IRQ_TIMER4_VIC          S3C64XX_IRQ_VIC0(28)
 #define IRQ_LCD_FIFO            S3C64XX_IRQ_VIC0(29)
 #define IRQ_LCD_VSYNC           S3C64XX_IRQ_VIC0(30)
 #define IRQ_LCD_SYSTEM          S3C64XX_IRQ_VIC0(31)
@@ -136,11 +136,19 @@
 #define IRQ_TC                  IRQ_PENDN
 #define IRQ_ADC                 S3C64XX_IRQ_VIC1(31)
 
+#define S3C64XX_TIMER_IRQ(x)    S3C_IRQ(64 + (x))
+
+#define IRQ_TIMER0              S3C64XX_TIMER_IRQ(0)
+#define IRQ_TIMER1              S3C64XX_TIMER_IRQ(1)
+#define IRQ_TIMER2              S3C64XX_TIMER_IRQ(2)
+#define IRQ_TIMER3              S3C64XX_TIMER_IRQ(3)
+#define IRQ_TIMER4              S3C64XX_TIMER_IRQ(4)
+
 /* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series
  * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE
  * which we place after the pair of VICs. */
 
-#define S3C_IRQ_EINT_BASE       S3C_IRQ(64)
+#define S3C_IRQ_EINT_BASE       S3C_IRQ(64+5)
 
 #define S3C_EINT(x)     ((x) + S3C_IRQ_EINT_BASE)