diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:07:08 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 18:15:46 -0500 |
commit | 80789e79150b34e45a630e2f4f1b04d82c449c19 (patch) | |
tree | 2fa0a12db09eafd00568e9c940933d58815c4721 /arch/arm/plat-s3c64xx/include | |
parent | 94df868b884d673c294e39a11acdfebf2bfcd67b (diff) |
[ARM] S3C64XX: Add IRQ_EINT support
Add the necessary code to support IRQ_EINT(x) on
the S3C64XX series of CPUs.
Note, since there is no GPIO configuration support
in the kernel, the irq set_type method does not
configure the relevant pin to interrupt.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include')
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/irqs.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h index 8bdfb27425e6..5ab41ad143b7 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h | |||
@@ -150,7 +150,8 @@ | |||
150 | 150 | ||
151 | #define S3C_IRQ_EINT_BASE S3C_IRQ(64+5) | 151 | #define S3C_IRQ_EINT_BASE S3C_IRQ(64+5) |
152 | 152 | ||
153 | #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) | 153 | #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) |
154 | #define IRQ_EINT(x) S3C_EINT(x) | ||
154 | 155 | ||
155 | /* Define NR_IRQs here, machine specific can always re-define. | 156 | /* Define NR_IRQs here, machine specific can always re-define. |
156 | * Currently the IRQ_EINT27 is the last one we can have. */ | 157 | * Currently the IRQ_EINT27 is the last one we can have. */ |