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authorBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:04 -0500
committerBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:04 -0500
commit7f2754378f3522a42daafdbb9d2385f341008454 (patch)
tree7a6223f270cdf53067a70c2e86b2190d3577c23d /arch/arm/plat-s3c24xx
parentc6ad115876763e4f15055982ecb9579cb7abab5f (diff)
parenta9c5d23ac724a3b908833cafbbbd49abe4741b86 (diff)
Merge branch 'next-s3c64xx' into next-merged
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig4
-rw-r--r--arch/arm/plat-s3c24xx/devs.c8
-rw-r--r--arch/arm/plat-s3c24xx/include/mach/pwm-clock.h55
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h100
-rw-r--r--arch/arm/plat-s3c24xx/s3c2410-clock.c1
5 files changed, 162 insertions, 6 deletions
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 0e07de2c9a9b..2c8a2f5d75ff 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -6,8 +6,8 @@
6 6
7config PLAT_S3C24XX 7config PLAT_S3C24XX
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410 || ARCH_S3C24A0
10 default y if ARCH_S3C2410 10 default y
11 select NO_IOPORT 11 select NO_IOPORT
12 select ARCH_REQUIRE_GPIOLIB 12 select ARCH_REQUIRE_GPIOLIB
13 help 13 help
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 6a33dbc494f4..9826efb91e48 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -192,8 +192,8 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
192 192
193static struct resource s3c_nand_resource[] = { 193static struct resource s3c_nand_resource[] = {
194 [0] = { 194 [0] = {
195 .start = S3C2410_PA_NAND, 195 .start = S3C24XX_PA_NAND,
196 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1, 196 .end = S3C24XX_PA_NAND + S3C24XX_SZ_NAND - 1,
197 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
198 } 198 }
199}; 199};
@@ -390,8 +390,8 @@ struct platform_device s3c_device_hwmon = {
390 390
391static struct resource s3c_sdi_resource[] = { 391static struct resource s3c_sdi_resource[] = {
392 [0] = { 392 [0] = {
393 .start = S3C2410_PA_SDI, 393 .start = S3C24XX_PA_SDI,
394 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1, 394 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [1] = { 397 [1] = {
diff --git a/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..a087de21bc20
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
@@ -0,0 +1,55 @@
1/* linux/arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C24xx - pwm clock and timer support
8 */
9
10/**
11 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
12 * @cfg: The timer TCFG1 register bits shifted down to 0.
13 *
14 * Return true if the given configuration from TCFG1 is a TCLK instead
15 * any of the TDIV clocks.
16 */
17static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
18{
19 return tcfg == S3C2410_TCFG1_MUX_TCLK;
20}
21
22/**
23 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
24 * @tcfg1: The tcfg1 setting, shifted down.
25 *
26 * Get the divisor value for the given tcfg1 setting. We assume the
27 * caller has already checked to see if this is not a TCLK source.
28 */
29static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
30{
31 return 1 << (1 + tcfg1);
32}
33
34/**
35 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
36 *
37 * Return true if we have a /1 in the tdiv setting.
38 */
39static inline unsigned int pwm_tdiv_has_div1(void)
40{
41 return 0;
42}
43
44/**
45 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
46 * @div: The divisor to calculate the bit information for.
47 *
48 * Turn a divisor into the necessary bit field for TCFG1.
49 */
50static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
51{
52 return ilog2(div) - 1;
53}
54
55#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
new file mode 100644
index 000000000000..e7be0c0d3702
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/map.h
@@ -0,0 +1,100 @@
1/* linux/include/asm-arm/plat-s3c24xx/map.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S3C24XX_MAP_H
14#define __ASM_PLAT_S3C24XX_MAP_H
15
16/* interrupt controller is the first thing we put in, to make
17 * the assembly code for the irq detection easier
18 */
19#define S3C24XX_VA_IRQ S3C_VA_IRQ
20#define S3C2410_PA_IRQ (0x4A000000)
21#define S3C24XX_SZ_IRQ SZ_1M
22
23/* memory controller registers */
24#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
25#define S3C2410_PA_MEMCTRL (0x48000000)
26#define S3C24XX_SZ_MEMCTRL SZ_1M
27
28/* UARTs */
29#define S3C24XX_VA_UART S3C_VA_UART
30#define S3C2410_PA_UART (0x50000000)
31#define S3C24XX_SZ_UART SZ_1M
32#define S3C_UART_OFFSET (0x4000)
33
34/* Timers */
35#define S3C24XX_VA_TIMER S3C_VA_TIMER
36#define S3C2410_PA_TIMER (0x51000000)
37#define S3C24XX_SZ_TIMER SZ_1M
38
39/* Clock and Power management */
40#define S3C24XX_VA_CLKPWR S3C_VA_SYS
41#define S3C24XX_SZ_CLKPWR SZ_1M
42
43/* USB Device port */
44#define S3C2410_PA_USBDEV (0x52000000)
45#define S3C24XX_SZ_USBDEV SZ_1M
46
47/* Watchdog */
48#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
49#define S3C2410_PA_WATCHDOG (0x53000000)
50#define S3C24XX_SZ_WATCHDOG SZ_1M
51
52/* Standard size definitions for peripheral blocks. */
53
54#define S3C24XX_SZ_IIC SZ_1M
55#define S3C24XX_SZ_IIS SZ_1M
56#define S3C24XX_SZ_ADC SZ_1M
57#define S3C24XX_SZ_SPI SZ_1M
58#define S3C24XX_SZ_SDI SZ_1M
59#define S3C24XX_SZ_NAND SZ_1M
60#define S3C24XX_SZ_USBHOST SZ_1M
61
62/* GPIO ports */
63
64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 maping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system.
70*/
71
72#define S3C2410_PA_GPIO (0x56000000)
73#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
74#define S3C24XX_SZ_GPIO SZ_1M
75
76
77/* ISA style IO, for each machine to sort out mappings for, if it
78 * implements it. We reserve two 16M regions for ISA.
79 */
80
81#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
82#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
83
84/* deal with the registers that move under the 2412/2413 */
85
86#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
87#ifndef __ASSEMBLY__
88extern void __iomem *s3c24xx_va_gpio2;
89#endif
90#ifdef CONFIG_CPU_S3C2412_ONLY
91#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
92#else
93#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
94#endif
95#else
96#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
97#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
98#endif
99
100#endif /* __ASM_PLAT_S3C24XX_MAP_H */
diff --git a/arch/arm/plat-s3c24xx/s3c2410-clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c
index 4e07943c1e29..b61bdb793734 100644
--- a/arch/arm/plat-s3c24xx/s3c2410-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c
@@ -272,5 +272,6 @@ int __init s3c2410_baseclk_add(void)
272 (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", 272 (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
273 (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); 273 (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
274 274
275 s3c_pwmclk_init();
275 return 0; 276 return 0;
276} 277}