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authorHeiko Stuebner <heiko@sntech.de>2012-01-27 02:28:29 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-01-27 02:29:33 -0500
commit0f78b2443a654afad7c5efdf0157c80747078682 (patch)
tree849dca7186212d1fa353c6bd9dd8f2be9a3d9c95 /arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
parentdcd6c92267155e70a94b3927bce681ce74b80d1f (diff)
ARM: S3C24XX: remove unused spi gpio setup functions
A grep through the kernel source revealed that neither the config-options nor the defined functions are used anywhere in the kernel. There was also no activity in this regard through the last kernel releases, so it seems this situation will not change in the future. Therefore this patch removes this seemingly dead code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c')
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c36
1 files changed, 0 insertions, 36 deletions
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
deleted file mode 100644
index 704175b0573f..000000000000
--- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12*/
13
14#include <linux/kernel.h>
15#include <linux/gpio.h>
16
17#include <mach/spi.h>
18#include <mach/regs-gpio.h>
19
20void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
21 int enable)
22{
23 if (enable) {
24 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0);
25 s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0);
26 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0);
27 s3c2410_gpio_pullup(S3C2410_GPE(11), 0);
28 s3c2410_gpio_pullup(S3C2410_GPE(13), 0);
29 } else {
30 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT);
31 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT);
32 s3c_gpio_setpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE);
33 s3c_gpio_setpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE);
34 s3c_gpio_setpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE);
35 }
36}