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authorBen Dooks <ben-linux@fluff.org>2008-12-18 11:17:37 -0500
committerBen Dooks <ben-linux@fluff.org>2008-12-18 11:17:37 -0500
commit56c035c9ce1f1850969778af6a4cc0b99089b6c8 (patch)
treeb6f1998be0c1e6bb623a0c55e8ba04d74bb58cf2 /arch/arm/plat-s3c/include
parent7f2754378f3522a42daafdbb9d2385f341008454 (diff)
parent438a5d42e052ec6126c5f1e24763b711210db33e (diff)
Merge branch 'next-s3c64xx-device' into next-merged
Conflicts: arch/arm/mach-s3c2440/mach-at2440evb.c
Diffstat (limited to 'arch/arm/plat-s3c/include')
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h8
-rw-r--r--arch/arm/plat-s3c/include/plat/fb.h73
-rw-r--r--arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h176
-rw-r--r--arch/arm/plat-s3c/include/plat/gpio-cfg.h110
-rw-r--r--arch/arm/plat-s3c/include/plat/gpio-core.h77
-rw-r--r--arch/arm/plat-s3c/include/plat/iic-core.h35
-rw-r--r--arch/arm/plat-s3c/include/plat/iic.h24
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-fb.h366
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-sdhci.h87
-rw-r--r--arch/arm/plat-s3c/include/plat/sdhci.h108
10 files changed, 1062 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index a689c7c5ac23..6b1b5231511c 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -24,15 +24,19 @@ extern struct platform_device *s3c24xx_uart_src[];
24 24
25extern struct platform_device s3c_device_timer[]; 25extern struct platform_device s3c_device_timer[];
26 26
27extern struct platform_device s3c_device_fb;
27extern struct platform_device s3c_device_usb; 28extern struct platform_device s3c_device_usb;
28extern struct platform_device s3c_device_lcd; 29extern struct platform_device s3c_device_lcd;
29extern struct platform_device s3c_device_wdt; 30extern struct platform_device s3c_device_wdt;
30extern struct platform_device s3c_device_i2c; 31extern struct platform_device s3c_device_i2c0;
32extern struct platform_device s3c_device_i2c1;
31extern struct platform_device s3c_device_iis; 33extern struct platform_device s3c_device_iis;
32extern struct platform_device s3c_device_rtc; 34extern struct platform_device s3c_device_rtc;
33extern struct platform_device s3c_device_adc; 35extern struct platform_device s3c_device_adc;
34extern struct platform_device s3c_device_sdi; 36extern struct platform_device s3c_device_sdi;
35extern struct platform_device s3c_device_hsmmc; 37extern struct platform_device s3c_device_hsmmc0;
38extern struct platform_device s3c_device_hsmmc1;
39extern struct platform_device s3c_device_hsmmc2;
36 40
37extern struct platform_device s3c_device_spi0; 41extern struct platform_device s3c_device_spi0;
38extern struct platform_device s3c_device_spi1; 42extern struct platform_device s3c_device_spi1;
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-s3c/include/plat/fb.h
new file mode 100644
index 000000000000..214ff561b0dd
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/fb.h
@@ -0,0 +1,73 @@
1/* linux/arch/arm/plat-s3c/include/plat/fb.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C - FB platform data definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __PLAT_S3C_FB_H
16#define __PLAT_S3C_FB_H __FILE__
17
18/**
19 * struct s3c_fb_pd_win - per window setup data
20 * @win_mode: The display parameters to initialise (not for window 0)
21 * @virtual_x: The virtual X size.
22 * @virtual_y: The virtual Y size.
23 */
24struct s3c_fb_pd_win {
25 struct fb_videomode win_mode;
26
27 unsigned short default_bpp;
28 unsigned short max_bpp;
29 unsigned short virtual_x;
30 unsigned short virtual_y;
31};
32
33/**
34 * struct s3c_fb_platdata - S3C driver platform specific information
35 * @setup_gpio: Setup the external GPIO pins to the right state to transfer
36 * the data from the display system to the connected display
37 * device.
38 * @vidcon0: The base vidcon0 values to control the panel data format.
39 * @vidcon1: The base vidcon1 values to control the panel data output.
40 * @win: The setup data for each hardware window, or NULL for unused.
41 * @display_mode: The LCD output display mode.
42 *
43 * The platform data supplies the video driver with all the information
44 * it requires to work with the display(s) attached to the machine. It
45 * controls the initial mode, the number of display windows (0 is always
46 * the base framebuffer) that are initialised etc.
47 *
48 */
49struct s3c_fb_platdata {
50 void (*setup_gpio)(void);
51
52 struct s3c_fb_pd_win *win[S3C_FB_MAX_WIN];
53
54 u32 vidcon0;
55 u32 vidcon1;
56};
57
58/**
59 * s3c_fb_set_platdata() - Setup the FB device with platform data.
60 * @pd: The platform data to set. The data is copied from the passed structure
61 * so the machine data can mark the data __initdata so that any unused
62 * machines will end up dumping their data at runtime.
63 */
64extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
65
66/**
67 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
68 *
69 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
70 */
71extern void s3c64xx_fb_gpio_setup_24bpp(void);
72
73#endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
new file mode 100644
index 000000000000..652e2bbdaa20
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h
@@ -0,0 +1,176 @@
1/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg-helper.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - GPIO pin configuration helper definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/* This is meant for core cpu support, machine or other driver files
16 * should not be including this header.
17 */
18
19#ifndef __PLAT_GPIO_CFG_HELPERS_H
20#define __PLAT_GPIO_CFG_HELPERS_H __FILE__
21
22/* As a note, all gpio configuration functions are entered exclusively, either
23 * with the relevant lock held or the system prevented from doing anything else
24 * by disabling interrupts.
25*/
26
27static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip,
28 unsigned int off, unsigned int config)
29{
30 return (chip->config->set_config)(chip, off, config);
31}
32
33static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip,
34 unsigned int off, s3c_gpio_pull_t pull)
35{
36 return (chip->config->set_pull)(chip, off, pull);
37}
38
39/**
40 * s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration.
41 * @chip: The gpio chip that is being configured.
42 * @off: The offset for the GPIO being configured.
43 * @cfg: The configuration value to set.
44 *
45 * This helper deal with the GPIO cases where the control register
46 * has two bits of configuration per gpio, which have the following
47 * functions:
48 * 00 = input
49 * 01 = output
50 * 1x = special function
51*/
52extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
53 unsigned int off, unsigned int cfg);
54
55/**
56 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
57 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured.
59 * @cfg: The configuration value to set.
60 *
61 * This helper deal with the GPIO cases where the control register
62 * has one bit of configuration for the gpio, where setting the bit
63 * means the pin is in special function mode and unset means output.
64*/
65extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
66 unsigned int off, unsigned int cfg);
67
68/**
69 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
70 * @chip: The gpio chip that is being configured.
71 * @off: The offset for the GPIO being configured.
72 * @cfg: The configuration value to set.
73 *
74 * This helper deal with the GPIO cases where the control register has 4 bits
75 * of control per GPIO, generally in the form of:
76 * 0000 = Input
77 * 0001 = Output
78 * others = Special functions (dependant on bank)
79 *
80 * Note, since the code to deal with the case where there are two control
81 * registers instead of one, we do not have a seperate set of functions for
82 * each case.
83*/
84extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg);
86
87
88/* Pull-{up,down} resistor controls.
89 *
90 * S3C2410,S3C2440,S3C24A0 = Pull-UP,
91 * S3C2412,S3C2413 = Pull-Down
92 * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef]
93 * S3C2443 = Pull-Both [not same as S3C6400]
94 */
95
96/**
97 * s3c_gpio_setpull_1up() - Pull configuration for choice of up or none.
98 * @chip: The gpio chip that is being configured.
99 * @off: The offset for the GPIO being configured.
100 * @param: pull: The pull mode being requested.
101 *
102 * This is a helper function for the case where we have GPIOs with one
103 * bit configuring the presence of a pull-up resistor.
104 */
105extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
106 unsigned int off, s3c_gpio_pull_t pull);
107
108/**
109 * s3c_gpio_setpull_1down() - Pull configuration for choice of down or none
110 * @chip: The gpio chip that is being configured
111 * @off: The offset for the GPIO being configured
112 * @param: pull: The pull mode being requested
113 *
114 * This is a helper function for the case where we have GPIOs with one
115 * bit configuring the presence of a pull-down resistor.
116 */
117extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip,
118 unsigned int off, s3c_gpio_pull_t pull);
119
120/**
121 * s3c_gpio_setpull_upown() - Pull configuration for choice of up, down or none
122 * @chip: The gpio chip that is being configured.
123 * @off: The offset for the GPIO being configured.
124 * @param: pull: The pull mode being requested.
125 *
126 * This is a helper function for the case where we have GPIOs with two
127 * bits configuring the presence of a pull resistor, in the following
128 * order:
129 * 00 = No pull resistor connected
130 * 01 = Pull-up resistor connected
131 * 10 = Pull-down resistor connected
132 */
133extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
134 unsigned int off, s3c_gpio_pull_t pull);
135
136
137/**
138 * s3c_gpio_getpull_updown() - Get configuration for choice of up, down or none
139 * @chip: The gpio chip that the GPIO pin belongs to
140 * @off: The offset to the pin to get the configuration of.
141 *
142 * This helper function reads the state of the pull-{up,down} resistor for the
143 * given GPIO in the same case as s3c_gpio_setpull_upown.
144*/
145extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
146 unsigned int off);
147
148/**
149 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
150 * @chip: The gpio chip that is being configured.
151 * @off: The offset for the GPIO being configured.
152 * @param: pull: The pull mode being requested.
153 *
154 * This is a helper function for the case where we have GPIOs with two
155 * bits configuring the presence of a pull resistor, in the following
156 * order:
157 * 00 = Pull-up resistor connected
158 * 10 = Pull-down resistor connected
159 * x1 = No pull up resistor
160 */
161extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip,
162 unsigned int off, s3c_gpio_pull_t pull);
163
164/**
165 * s3c_gpio_getpull_s3c2443() - Get configuration for s3c2443 pull resistors
166 * @chip: The gpio chip that the GPIO pin belongs to.
167 * @off: The offset to the pin to get the configuration of.
168 *
169 * This helper function reads the state of the pull-{up,down} resistor for the
170 * given GPIO in the same case as s3c_gpio_setpull_upown.
171*/
172extern s3c_gpio_pull_t s3c_gpio_getpull_s3c24xx(struct s3c_gpio_chip *chip,
173 unsigned int off);
174
175#endif /* __PLAT_GPIO_CFG_HELPERS_H */
176
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-s3c/include/plat/gpio-cfg.h
new file mode 100644
index 000000000000..29cd6a86cade
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-cfg.h
@@ -0,0 +1,110 @@
1/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - GPIO pin configuration
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/* This file contains the necessary definitions to get the basic gpio
16 * pin configuration done such as setting a pin to input or output or
17 * changing the pull-{up,down} configurations.
18 */
19
20/* Note, this interface is being added to the s3c64xx arch first and will
21 * be added to the s3c24xx systems later.
22 */
23
24#ifndef __PLAT_GPIO_CFG_H
25#define __PLAT_GPIO_CFG_H __FILE__
26
27typedef unsigned int __bitwise__ s3c_gpio_pull_t;
28
29/* forward declaration if gpio-core.h hasn't been included */
30struct s3c_gpio_chip;
31
32/**
33 * struct s3c_gpio_cfg GPIO configuration
34 * @cfg_eint: Configuration setting when used for external interrupt source
35 * @get_pull: Read the current pull configuration for the GPIO
36 * @set_pull: Set the current pull configuraiton for the GPIO
37 * @set_config: Set the current configuration for the GPIO
38 * @get_config: Read the current configuration for the GPIO
39 *
40 * Each chip can have more than one type of GPIO bank available and some
41 * have different capabilites even when they have the same control register
42 * layouts. Provide an point to vector control routine and provide any
43 * per-bank configuration information that other systems such as the
44 * external interrupt code will need.
45 */
46struct s3c_gpio_cfg {
47 unsigned int cfg_eint;
48
49 s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs);
50 int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs,
51 s3c_gpio_pull_t pull);
52
53 unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs);
54 int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs,
55 unsigned config);
56};
57
58#define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
59#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
60
61/* Defines for generic pin configurations */
62#define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
63#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
64#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
65
66#define s3c_gpio_is_cfg_special(_cfg) \
67 (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
68
69/**
70 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
71 * @pin pin The pin number to configure.
72 * @pin to The configuration for the pin's function.
73 *
74 * Configure which function is actually connected to the external
75 * pin, such as an gpio input, output or some form of special function
76 * connected to an internal peripheral block.
77 */
78extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
79
80/* Define values for the pull-{up,down} available for each gpio pin.
81 *
82 * These values control the state of the weak pull-{up,down} resistors
83 * available on most pins on the S3C series. Not all chips support both
84 * up or down settings, and it may be dependant on the chip that is being
85 * used to whether the particular mode is available.
86 */
87#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
88#define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01)
89#define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02)
90
91/**
92 * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
93 * @pin: The pin number to configure the pull resistor.
94 * @pull: The configuration for the pull resistor.
95 *
96 * This function sets the state of the pull-{up,down} resistor for the
97 * specified pin. It will return 0 if successfull, or a negative error
98 * code if the pin cannot support the requested pull setting.
99*/
100extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
101
102/**
103 * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
104 * @pin: The pin number to get the settings for
105 *
106 * Read the pull resistor value for the specified pin.
107*/
108extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
109
110#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h
new file mode 100644
index 000000000000..2fc60a580ac8
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-core.h
@@ -0,0 +1,77 @@
1/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C Platform - GPIO core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/* Define the core gpiolib support functions that the s3c platforms may
15 * need to extend or change depending on the hardware and the s3c chip
16 * selected at build or found at run time.
17 *
18 * These definitions are not intended for driver inclusion, there is
19 * nothing here that should not live outside the platform and core
20 * specific code.
21*/
22
23struct s3c_gpio_cfg;
24
25/**
26 * struct s3c_gpio_chip - wrapper for specific implementation of gpio
27 * @chip: The chip structure to be exported via gpiolib.
28 * @base: The base pointer to the gpio configuration registers.
29 * @config: special function and pull-resistor control information.
30 *
31 * This wrapper provides the necessary information for the Samsung
32 * specific gpios being registered with gpiolib.
33 */
34struct s3c_gpio_chip {
35 struct gpio_chip chip;
36 struct s3c_gpio_cfg *config;
37 void __iomem *base;
38};
39
40static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
41{
42 return container_of(gpc, struct s3c_gpio_chip, chip);
43}
44
45/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
46 * @chip: The chip to register
47 *
48 * This is a wrapper to gpiochip_add() that takes our specific gpio chip
49 * information and makes the necessary alterations for the platform and
50 * notes the information for use with the configuration systems and any
51 * other parts of the system.
52 */
53extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
54
55/* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios
56 * for use with the configuration calls, and other parts of the s3c gpiolib
57 * support code.
58 *
59 * Not all s3c support code will need this, as some configurations of cpu
60 * may only support one or two different configuration options and have an
61 * easy gpio to s3c_gpio_chip mapping function. If this is the case, then
62 * the machine support file should provide its own s3c_gpiolib_getchip()
63 * and any other necessary functions.
64 */
65
66#ifdef CONFIG_S3C_GPIO_TRACK
67extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
68
69static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip)
70{
71 return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
72}
73#else
74/* machine specific code should provide s3c_gpiolib_getchip */
75
76static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { }
77#endif
diff --git a/arch/arm/plat-s3c/include/plat/iic-core.h b/arch/arm/plat-s3c/include/plat/iic-core.h
new file mode 100644
index 000000000000..36397ca20962
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/iic-core.h
@@ -0,0 +1,35 @@
1/* arch/arm/mach-s3c2410/include/mach/iic-core.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - I2C Controller core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_IIC_CORE_H
15#define __ASM_ARCH_IIC_CORE_H __FILE__
16
17/* These functions are only for use with the core support code, such as
18 * the cpu specific initialisation code
19 */
20
21/* re-define device name depending on support. */
22static inline void s3c_i2c0_setname(char *name)
23{
24 /* currently this device is always compiled in */
25 s3c_device_i2c0.name = name;
26}
27
28static inline void s3c_i2c1_setname(char *name)
29{
30#ifdef CONFIG_S3C_DEV_I2C1
31 s3c_device_i2c1.name = name;
32#endif
33}
34
35#endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
index 5106acaa1d0e..dc1dfcb9bc6c 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-s3c/include/plat/iic.h
@@ -28,6 +28,30 @@ struct s3c2410_platform_i2c {
28 unsigned long max_freq; /* max frequency for the bus */ 28 unsigned long max_freq; /* max frequency for the bus */
29 unsigned long min_freq; /* min frequency for the bus */ 29 unsigned long min_freq; /* min frequency for the bus */
30 unsigned int sda_delay; /* pclks (s3c2440 only) */ 30 unsigned int sda_delay; /* pclks (s3c2440 only) */
31
32 void (*cfg_gpio)(struct platform_device *dev);
31}; 33};
32 34
35/**
36 * s3c_i2c0_set_platdata - set platform data for i2c0 device
37 * @i2c: The platform data to set, or NULL for default data.
38 *
39 * Register the given platform data for use with the i2c0 device. This
40 * call copies the platform data, so the caller can use __initdata for
41 * their copy.
42 *
43 * This call will set cfg_gpio if is null to the default platform
44 * implementation.
45 *
46 * Any user of s3c_device_i2c0 should call this, even if it is with
47 * NULL to ensure that the device is given the default platform data
48 * as the driver will no longer carry defaults.
49 */
50extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c);
51extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c);
52
53/* defined by architecture to configure gpio */
54extern void s3c_i2c0_cfg_gpio(struct platform_device *dev);
55extern void s3c_i2c1_cfg_gpio(struct platform_device *dev);
56
33#endif /* __ASM_ARCH_IIC_H */ 57#endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-s3c/include/plat/regs-fb.h
new file mode 100644
index 000000000000..e9ee599d430e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-fb.h
@@ -0,0 +1,366 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - new-style framebuffer register definitions
9 *
10 * This is the register set for the new style framebuffer interface
11 * found from the S3C2443 onwards into the S3C2416, S3C2450 and the
12 * S3C64XX series such as the S3C6400 and S3C6410.
13 *
14 * The file does not contain the cpu specific items which are based on
15 * whichever architecture is selected, it only contains the core of the
16 * register set. See <mach/regs-fb.h> to get the specifics.
17 *
18 * Note, we changed to using regs-fb.h as it avoids any clashes with
19 * the original regs-lcd.h so out of the way of regs-lcd.h as well as
20 * indicating the newer block is much more than just an LCD interface.
21 *
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
25*/
26
27/* Please do not include this file directly, use <mach/regs-fb.h> to
28 * ensure all the localised SoC support is included as necessary.
29*/
30
31/* VIDCON0 */
32
33#define VIDCON0 (0x00)
34#define VIDCON0_INTERLACE (1 << 29)
35#define VIDCON0_VIDOUT_MASK (0x3 << 26)
36#define VIDCON0_VIDOUT_SHIFT (26)
37#define VIDCON0_VIDOUT_RGB (0x0 << 26)
38#define VIDCON0_VIDOUT_TV (0x1 << 26)
39#define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26)
40#define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26)
41
42#define VIDCON0_L1_DATA_MASK (0x7 << 23)
43#define VIDCON0_L1_DATA_SHIFT (23)
44#define VIDCON0_L1_DATA_16BPP (0x0 << 23)
45#define VIDCON0_L1_DATA_18BPP16 (0x1 << 23)
46#define VIDCON0_L1_DATA_18BPP9 (0x2 << 23)
47#define VIDCON0_L1_DATA_24BPP (0x3 << 23)
48#define VIDCON0_L1_DATA_18BPP (0x4 << 23)
49#define VIDCON0_L1_DATA_16BPP8 (0x5 << 23)
50
51#define VIDCON0_L0_DATA_MASK (0x7 << 20)
52#define VIDCON0_L0_DATA_SHIFT (20)
53#define VIDCON0_L0_DATA_16BPP (0x0 << 20)
54#define VIDCON0_L0_DATA_18BPP16 (0x1 << 20)
55#define VIDCON0_L0_DATA_18BPP9 (0x2 << 20)
56#define VIDCON0_L0_DATA_24BPP (0x3 << 20)
57#define VIDCON0_L0_DATA_18BPP (0x4 << 20)
58#define VIDCON0_L0_DATA_16BPP8 (0x5 << 20)
59
60#define VIDCON0_PNRMODE_MASK (0x3 << 17)
61#define VIDCON0_PNRMODE_SHIFT (17)
62#define VIDCON0_PNRMODE_RGB (0x0 << 17)
63#define VIDCON0_PNRMODE_BGR (0x1 << 17)
64#define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17)
65#define VIDCON0_PNRMODE_SERIAL_BGR (0x3 << 17)
66
67#define VIDCON0_CLKVALUP (1 << 16)
68#define VIDCON0_CLKVAL_F_MASK (0xff << 6)
69#define VIDCON0_CLKVAL_F_SHIFT (6)
70#define VIDCON0_CLKVAL_F_LIMIT (0xff)
71#define VIDCON0_CLKVAL_F(_x) ((_x) << 6)
72#define VIDCON0_VLCKFREE (1 << 5)
73#define VIDCON0_CLKDIR (1 << 4)
74
75#define VIDCON0_CLKSEL_MASK (0x3 << 2)
76#define VIDCON0_CLKSEL_SHIFT (2)
77#define VIDCON0_CLKSEL_HCLK (0x0 << 2)
78#define VIDCON0_CLKSEL_LCD (0x1 << 2)
79#define VIDCON0_CLKSEL_27M (0x3 << 2)
80
81#define VIDCON0_ENVID (1 << 1)
82#define VIDCON0_ENVID_F (1 << 0)
83
84#define VIDCON1 (0x04)
85#define VIDCON1_LINECNT_MASK (0x7ff << 16)
86#define VIDCON1_LINECNT_SHIFT (16)
87#define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff)
88#define VIDCON1_VSTATUS_MASK (0x3 << 13)
89#define VIDCON1_VSTATUS_SHIFT (13)
90#define VIDCON1_VSTATUS_VSYNC (0x0 << 13)
91#define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13)
92#define VIDCON1_VSTATUS_ACTIVE (0x2 << 13)
93#define VIDCON1_VSTATUS_FRONTPORCH (0x0 << 13)
94
95#define VIDCON1_INV_VCLK (1 << 7)
96#define VIDCON1_INV_HSYNC (1 << 6)
97#define VIDCON1_INV_VSYNC (1 << 5)
98#define VIDCON1_INV_VDEN (1 << 4)
99
100/* VIDCON2 */
101
102#define VIDCON2 (0x08)
103#define VIDCON2_EN601 (1 << 23)
104#define VIDCON2_TVFMTSEL_SW (1 << 14)
105
106#define VIDCON2_TVFMTSEL1_MASK (0x3 << 12)
107#define VIDCON2_TVFMTSEL1_SHIFT (12)
108#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
109#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
110#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
111
112#define VIDCON2_ORGYCbCr (1 << 8)
113#define VIDCON2_YUVORDCrCb (1 << 7)
114
115/* VIDTCON0 */
116
117#define VIDTCON0_VBPDE_MASK (0xff << 24)
118#define VIDTCON0_VBPDE_SHIFT (24)
119#define VIDTCON0_VBPDE_LIMIT (0xff)
120#define VIDTCON0_VBPDE(_x) ((_x) << 24)
121
122#define VIDTCON0_VBPD_MASK (0xff << 16)
123#define VIDTCON0_VBPD_SHIFT (16)
124#define VIDTCON0_VBPD_LIMIT (0xff)
125#define VIDTCON0_VBPD(_x) ((_x) << 16)
126
127#define VIDTCON0_VFPD_MASK (0xff << 8)
128#define VIDTCON0_VFPD_SHIFT (8)
129#define VIDTCON0_VFPD_LIMIT (0xff)
130#define VIDTCON0_VFPD(_x) ((_x) << 8)
131
132#define VIDTCON0_VSPW_MASK (0xff << 0)
133#define VIDTCON0_VSPW_SHIFT (0)
134#define VIDTCON0_VSPW_LIMIT (0xff)
135#define VIDTCON0_VSPW(_x) ((_x) << 0)
136
137/* VIDTCON1 */
138
139#define VIDTCON1_VFPDE_MASK (0xff << 24)
140#define VIDTCON1_VFPDE_SHIFT (24)
141#define VIDTCON1_VFPDE_LIMIT (0xff)
142#define VIDTCON1_VFPDE(_x) ((_x) << 24)
143
144#define VIDTCON1_HBPD_MASK (0xff << 16)
145#define VIDTCON1_HBPD_SHIFT (16)
146#define VIDTCON1_HBPD_LIMIT (0xff)
147#define VIDTCON1_HBPD(_x) ((_x) << 16)
148
149#define VIDTCON1_HFPD_MASK (0xff << 8)
150#define VIDTCON1_HFPD_SHIFT (8)
151#define VIDTCON1_HFPD_LIMIT (0xff)
152#define VIDTCON1_HFPD(_x) ((_x) << 8)
153
154#define VIDTCON1_HSPW_MASK (0xff << 0)
155#define VIDTCON1_HSPW_SHIFT (0)
156#define VIDTCON1_HSPW_LIMIT (0xff)
157#define VIDTCON1_HSPW(_x) ((_x) << 0)
158
159#define VIDTCON2 (0x18)
160#define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
161#define VIDTCON2_LINEVAL_SHIFT (11)
162#define VIDTCON2_LINEVAL_LIMIT (0x7ff)
163#define VIDTCON2_LINEVAL(_x) ((_x) << 11)
164
165#define VIDTCON2_HOZVAL_MASK (0x7ff << 0)
166#define VIDTCON2_HOZVAL_SHIFT (0)
167#define VIDTCON2_HOZVAL_LIMIT (0x7ff)
168#define VIDTCON2_HOZVAL(_x) ((_x) << 0)
169
170/* WINCONx */
171
172
173#define WINCONx_BITSWP (1 << 18)
174#define WINCONx_BYTSWP (1 << 17)
175#define WINCONx_HAWSWP (1 << 16)
176#define WINCONx_BURSTLEN_MASK (0x3 << 9)
177#define WINCONx_BURSTLEN_SHIFT (9)
178#define WINCONx_BURSTLEN_16WORD (0x0 << 9)
179#define WINCONx_BURSTLEN_8WORD (0x1 << 9)
180#define WINCONx_BURSTLEN_4WORD (0x2 << 9)
181
182#define WINCONx_ENWIN (1 << 0)
183#define WINCON0_BPPMODE_MASK (0xf << 2)
184#define WINCON0_BPPMODE_SHIFT (2)
185#define WINCON0_BPPMODE_1BPP (0x0 << 2)
186#define WINCON0_BPPMODE_2BPP (0x1 << 2)
187#define WINCON0_BPPMODE_4BPP (0x2 << 2)
188#define WINCON0_BPPMODE_8BPP_PALETTE (0x3 << 2)
189#define WINCON0_BPPMODE_16BPP_565 (0x5 << 2)
190#define WINCON0_BPPMODE_16BPP_1555 (0x7 << 2)
191#define WINCON0_BPPMODE_18BPP_666 (0x8 << 2)
192#define WINCON0_BPPMODE_24BPP_888 (0xb << 2)
193
194#define WINCON1_BLD_PIX (1 << 6)
195
196#define WINCON1_ALPHA_SEL (1 << 1)
197#define WINCON1_BPPMODE_MASK (0xf << 2)
198#define WINCON1_BPPMODE_SHIFT (2)
199#define WINCON1_BPPMODE_1BPP (0x0 << 2)
200#define WINCON1_BPPMODE_2BPP (0x1 << 2)
201#define WINCON1_BPPMODE_4BPP (0x2 << 2)
202#define WINCON1_BPPMODE_8BPP_PALETTE (0x3 << 2)
203#define WINCON1_BPPMODE_8BPP_1232 (0x4 << 2)
204#define WINCON1_BPPMODE_16BPP_565 (0x5 << 2)
205#define WINCON1_BPPMODE_16BPP_A1555 (0x6 << 2)
206#define WINCON1_BPPMODE_16BPP_I1555 (0x7 << 2)
207#define WINCON1_BPPMODE_18BPP_666 (0x8 << 2)
208#define WINCON1_BPPMODE_18BPP_A1665 (0x9 << 2)
209#define WINCON1_BPPMODE_19BPP_A1666 (0xa << 2)
210#define WINCON1_BPPMODE_24BPP_888 (0xb << 2)
211#define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2)
212#define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2)
213#define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2)
214
215
216#define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11)
217#define VIDOSDxA_TOPLEFT_X_SHIFT (11)
218#define VIDOSDxA_TOPLEFT_X_LIMIT (0x7ff)
219#define VIDOSDxA_TOPLEFT_X(_x) ((_x) << 11)
220
221#define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0)
222#define VIDOSDxA_TOPLEFT_Y_SHIFT (0)
223#define VIDOSDxA_TOPLEFT_Y_LIMIT (0x7ff)
224#define VIDOSDxA_TOPLEFT_Y(_x) ((_x) << 0)
225
226#define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11)
227#define VIDOSDxB_BOTRIGHT_X_SHIFT (11)
228#define VIDOSDxB_BOTRIGHT_X_LIMIT (0x7ff)
229#define VIDOSDxB_BOTRIGHT_X(_x) ((_x) << 11)
230
231#define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0)
232#define VIDOSDxB_BOTRIGHT_Y_SHIFT (0)
233#define VIDOSDxB_BOTRIGHT_Y_LIMIT (0x7ff)
234#define VIDOSDxB_BOTRIGHT_Y(_x) ((_x) << 0)
235
236/* For VIDOSD[1..4]C */
237#define VIDISD14C_ALPHA0_R(_x) ((_x) << 20)
238#define VIDISD14C_ALPHA0_G_MASK (0xf << 16)
239#define VIDISD14C_ALPHA0_G_SHIFT (16)
240#define VIDISD14C_ALPHA0_G_LIMIT (0xf)
241#define VIDISD14C_ALPHA0_G(_x) ((_x) << 16)
242#define VIDISD14C_ALPHA0_B_MASK (0xf << 12)
243#define VIDISD14C_ALPHA0_B_SHIFT (12)
244#define VIDISD14C_ALPHA0_B_LIMIT (0xf)
245#define VIDISD14C_ALPHA0_B(_x) ((_x) << 12)
246#define VIDISD14C_ALPHA1_R_MASK (0xf << 8)
247#define VIDISD14C_ALPHA1_R_SHIFT (8)
248#define VIDISD14C_ALPHA1_R_LIMIT (0xf)
249#define VIDISD14C_ALPHA1_R(_x) ((_x) << 8)
250#define VIDISD14C_ALPHA1_G_MASK (0xf << 4)
251#define VIDISD14C_ALPHA1_G_SHIFT (4)
252#define VIDISD14C_ALPHA1_G_LIMIT (0xf)
253#define VIDISD14C_ALPHA1_G(_x) ((_x) << 4)
254#define VIDISD14C_ALPHA1_B_MASK (0xf << 0)
255#define VIDISD14C_ALPHA1_B_SHIFT (0)
256#define VIDISD14C_ALPHA1_B_LIMIT (0xf)
257#define VIDISD14C_ALPHA1_B(_x) ((_x) << 0)
258
259/* Video buffer addresses */
260#define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8))
261#define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8))
262#define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8))
263#define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8))
264#define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4))
265
266#define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13)
267#define VIDW_BUF_SIZE_OFFSET_SHIFT (13)
268#define VIDW_BUF_SIZE_OFFSET_LIMIT (0x1fff)
269#define VIDW_BUF_SIZE_OFFSET(_x) ((_x) << 13)
270
271#define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0)
272#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT (0)
273#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT (0x1fff)
274#define VIDW_BUF_SIZE_PAGEWIDTH(_x) ((_x) << 0)
275
276/* Interrupt controls and status */
277
278#define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20)
279#define VIDINTCON0_FIFOINTERVAL_SHIFT (20)
280#define VIDINTCON0_FIFOINTERVAL_LIMIT (0x3f)
281#define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20)
282
283#define VIDINTCON0_INT_SYSMAINCON (1 << 19)
284#define VIDINTCON0_INT_SYSSUBCON (1 << 18)
285#define VIDINTCON0_INT_I80IFDONE (1 << 17)
286
287#define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15)
288#define VIDINTCON0_FRAMESEL0_SHIFT (15)
289#define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15)
290#define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15)
291#define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15)
292#define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15)
293
294#define VIDINTCON0_FRAMESEL1 (1 << 14)
295#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 14)
296#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 14)
297#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 14)
298#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 14)
299
300#define VIDINTCON0_INT_FRAME (1 << 12)
301#define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5)
302#define VIDINTCON0_FIFIOSEL_SHIFT (5)
303#define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5)
304#define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5)
305
306#define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2)
307#define VIDINTCON0_FIFOLEVEL_SHIFT (2)
308#define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2)
309#define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2)
310#define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2)
311#define VIDINTCON0_FIFOLEVEL_EMPTY (0x3 << 2)
312#define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2)
313
314#define VIDINTCON0_INT_FIFO_MASK (0x3 << 0)
315#define VIDINTCON0_INT_FIFO_SHIFT (0)
316#define VIDINTCON0_INT_ENABLE (1 << 0)
317
318#define VIDINTCON1 (0x134)
319#define VIDINTCON1_INT_I180 (1 << 2)
320#define VIDINTCON1_INT_FRAME (1 << 1)
321#define VIDINTCON1_INT_FIFO (1 << 0)
322
323/* Window colour-key control registers */
324
325#define WxKEYCON0_KEYBL_EN (1 << 26)
326#define WxKEYCON0_KEYEN_F (1 << 25)
327#define WxKEYCON0_DIRCON (1 << 24)
328#define WxKEYCON0_COMPKEY_MASK (0xffffff << 0)
329#define WxKEYCON0_COMPKEY_SHIFT (0)
330#define WxKEYCON0_COMPKEY_LIMIT (0xffffff)
331#define WxKEYCON0_COMPKEY(_x) ((_x) << 0)
332#define WxKEYCON1_COLVAL_MASK (0xffffff << 0)
333#define WxKEYCON1_COLVAL_SHIFT (0)
334#define WxKEYCON1_COLVAL_LIMIT (0xffffff)
335#define WxKEYCON1_COLVAL(_x) ((_x) << 0)
336
337
338/* Window blanking (MAP) */
339
340#define WINxMAP_MAP (1 << 24)
341#define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0)
342#define WINxMAP_MAP_COLOUR_SHIFT (0)
343#define WINxMAP_MAP_COLOUR_LIMIT (0xffffff)
344#define WINxMAP_MAP_COLOUR(_x) ((_x) << 0)
345
346#define WPALCON_PAL_UPDATE (1 << 9)
347#define WPALCON_W1PAL_MASK (0x7 << 3)
348#define WPALCON_W1PAL_SHIFT (3)
349#define WPALCON_W1PAL_25BPP_A888 (0x0 << 3)
350#define WPALCON_W1PAL_24BPP (0x1 << 3)
351#define WPALCON_W1PAL_19BPP_A666 (0x2 << 3)
352#define WPALCON_W1PAL_18BPP_A665 (0x3 << 3)
353#define WPALCON_W1PAL_18BPP (0x4 << 3)
354#define WPALCON_W1PAL_16BPP_A555 (0x5 << 3)
355#define WPALCON_W1PAL_16BPP_565 (0x6 << 3)
356
357#define WPALCON_W0PAL_MASK (0x7 << 0)
358#define WPALCON_W0PAL_SHIFT (0)
359#define WPALCON_W0PAL_25BPP_A888 (0x0 << 0)
360#define WPALCON_W0PAL_24BPP (0x1 << 0)
361#define WPALCON_W0PAL_19BPP_A666 (0x2 << 0)
362#define WPALCON_W0PAL_18BPP_A665 (0x3 << 0)
363#define WPALCON_W0PAL_18BPP (0x4 << 0)
364#define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
365#define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
366
diff --git a/arch/arm/plat-s3c/include/plat/regs-sdhci.h b/arch/arm/plat-s3c/include/plat/regs-sdhci.h
new file mode 100644
index 000000000000..e34049ad44cc
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-sdhci.h
@@ -0,0 +1,87 @@
1/* linux/arch/arm/plat-s3c/include/plat/regs-sdhci.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - SDHCI (HSMMC) register definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __PLAT_S3C_SDHCI_REGS_H
16#define __PLAT_S3C_SDHCI_REGS_H __FILE__
17
18#define S3C_SDHCI_CONTROL2 (0x80)
19#define S3C_SDHCI_CONTROL3 (0x84)
20#define S3C64XX_SDHCI_CONTROL4 (0x8C)
21
22#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31)
23#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK (1 << 30)
24#define S3C_SDHCI_CTRL2_CDINVRXD3 (1 << 29)
25#define S3C_SDHCI_CTRL2_SLCARDOUT (1 << 28)
26
27#define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24)
28#define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT (24)
29#define S3C_SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24)
30
31#define S3C_SDHCI_CTRL2_LVLDAT_MASK (0xff << 16)
32#define S3C_SDHCI_CTRL2_LVLDAT_SHIFT (16)
33#define S3C_SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16)
34
35#define S3C_SDHCI_CTRL2_ENFBCLKTX (1 << 15)
36#define S3C_SDHCI_CTRL2_ENFBCLKRX (1 << 14)
37#define S3C_SDHCI_CTRL2_SDCDSEL (1 << 13)
38#define S3C_SDHCI_CTRL2_SDSIGPC (1 << 12)
39#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11)
40
41#define S3C_SDHCI_CTRL2_DFCNT_MASK (0x3 << 9)
42#define S3C_SDHCI_CTRL2_DFCNT_SHIFT (9)
43#define S3C_SDHCI_CTRL2_DFCNT_NONE (0x0 << 9)
44#define S3C_SDHCI_CTRL2_DFCNT_4SDCLK (0x1 << 9)
45#define S3C_SDHCI_CTRL2_DFCNT_16SDCLK (0x2 << 9)
46#define S3C_SDHCI_CTRL2_DFCNT_64SDCLK (0x3 << 9)
47
48#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8)
49#define S3C_SDHCI_CTRL2_RWAITMODE (1 << 7)
50#define S3C_SDHCI_CTRL2_DISBUFRD (1 << 6)
51#define S3C_SDHCI_CTRL2_SELBASECLK_MASK (0x3 << 4)
52#define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT (4)
53#define S3C_SDHCI_CTRL2_PWRSYNC (1 << 3)
54#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1)
55#define S3C_SDHCI_CTRL2_HWINITFIN (1 << 0)
56
57#define S3C_SDHCI_CTRL3_FCSEL3 (1 << 31)
58#define S3C_SDHCI_CTRL3_FCSEL2 (1 << 23)
59#define S3C_SDHCI_CTRL3_FCSEL1 (1 << 15)
60#define S3C_SDHCI_CTRL3_FCSEL0 (1 << 7)
61
62#define S3C_SDHCI_CTRL3_FIA3_MASK (0x7f << 24)
63#define S3C_SDHCI_CTRL3_FIA3_SHIFT (24)
64#define S3C_SDHCI_CTRL3_FIA3(_x) ((_x) << 24)
65
66#define S3C_SDHCI_CTRL3_FIA2_MASK (0x7f << 16)
67#define S3C_SDHCI_CTRL3_FIA2_SHIFT (16)
68#define S3C_SDHCI_CTRL3_FIA2(_x) ((_x) << 16)
69
70#define S3C_SDHCI_CTRL3_FIA1_MASK (0x7f << 8)
71#define S3C_SDHCI_CTRL3_FIA1_SHIFT (8)
72#define S3C_SDHCI_CTRL3_FIA1(_x) ((_x) << 8)
73
74#define S3C_SDHCI_CTRL3_FIA0_MASK (0x7f << 0)
75#define S3C_SDHCI_CTRL3_FIA0_SHIFT (0)
76#define S3C_SDHCI_CTRL3_FIA0(_x) ((_x) << 0)
77
78#define S3C64XX_SDHCI_CONTROL4_DRIVE_MASK (0x3 << 16)
79#define S3C64XX_SDHCI_CONTROL4_DRIVE_SHIFT (16)
80#define S3C64XX_SDHCI_CONTROL4_DRIVE_2mA (0x0 << 16)
81#define S3C64XX_SDHCI_CONTROL4_DRIVE_4mA (0x1 << 16)
82#define S3C64XX_SDHCI_CONTROL4_DRIVE_7mA (0x2 << 16)
83#define S3C64XX_SDHCI_CONTROL4_DRIVE_9mA (0x3 << 16)
84
85#define S3C64XX_SDHCI_CONTROL4_BUSY (1)
86
87#endif /* __PLAT_S3C_SDHCI_REGS_H */
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h
new file mode 100644
index 000000000000..c4ca3920ca4b
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/sdhci.h
@@ -0,0 +1,108 @@
1/* linux/arch/arm/plat-s3c/include/plat/sdhci.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - SDHCI (HSMMC) platform data definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __PLAT_S3C_SDHCI_H
16#define __PLAT_S3C_SDHCI_H __FILE__
17
18struct platform_device;
19struct mmc_host;
20struct mmc_card;
21struct mmc_ios;
22
23/**
24 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
25 * @max_width: The maximum number of data bits supported.
26 * @host_caps: Standard MMC host capabilities bit field.
27 * @cfg_gpio: Configure the GPIO for a specific card bit-width
28 * @cfg_card: Configure the interface for a specific card and speed. This
29 * is necessary the controllers and/or GPIO blocks require the
30 * changing of driver-strength and other controls dependant on
31 * the card and speed of operation.
32 *
33 * Initialisation data specific to either the machine or the platform
34 * for the device driver to use or call-back when configuring gpio or
35 * card speed information.
36*/
37struct s3c_sdhci_platdata {
38 unsigned int max_width;
39 unsigned int host_caps;
40
41 char **clocks; /* set of clock sources */
42
43 void (*cfg_gpio)(struct platform_device *dev, int width);
44 void (*cfg_card)(struct platform_device *dev,
45 void __iomem *regbase,
46 struct mmc_ios *ios,
47 struct mmc_card *card);
48};
49
50/**
51 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
52 * @pd: Platform data to register to device.
53 *
54 * Register the given platform data for use withe S3C SDHCI device.
55 * The call will copy the platform data, so the board definitions can
56 * make the structure itself __initdata.
57 */
58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
60
61/* Default platform data, exported so that per-cpu initialisation can
62 * set the correct one when there are more than one cpu type selected.
63*/
64
65extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
66extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
67
68/* Helper function availablity */
69
70#ifdef CONFIG_S3C6410_SETUP_SDHCI
71extern char *s3c6410_hsmmc_clksrcs[4];
72
73extern void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
74extern void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
75
76extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
77 void __iomem *r,
78 struct mmc_ios *ios,
79 struct mmc_card *card);
80
81#ifdef CONFIG_S3C_DEV_HSMMC
82static inline void s3c6410_default_sdhci0(void)
83{
84 s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
85 s3c_hsmmc0_def_platdata.cfg_gpio = s3c6410_setup_sdhci0_cfg_gpio;
86 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
87}
88#else
89static inline void s3c6410_default_sdhci0(void) { }
90#endif /* CONFIG_S3C_DEV_HSMMC */
91
92#ifdef CONFIG_S3C_DEV_HSMMC1
93static inline void s3c6410_default_sdhci1(void)
94{
95 s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
96 s3c_hsmmc1_def_platdata.cfg_gpio = s3c6410_setup_sdhci1_cfg_gpio;
97 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
98}
99#else
100static inline void s3c6410_default_sdhci1(void) { }
101#endif /* CONFIG_S3C_DEV_HSMMC1 */
102
103#else
104static inline void s3c6410_default_sdhci0(void) { }
105static inline void s3c6410_default_sdhci1(void) { }
106#endif /* CONFIG_S3C6410_SETUP_SDHCI */
107
108#endif /* __PLAT_S3C_SDHCI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 14:27:22 -0500