diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 08:24:33 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 08:24:33 -0500 |
commit | 2e0e943436912ffe0848ece58167edfe754edb96 (patch) | |
tree | b91919095c74742fa06e2105db6d859bee39b2b4 /arch/arm/plat-orion | |
parent | a32737e1ca650504f172292dd344eb64c02311f3 (diff) | |
parent | ef3a0bf5bfadbace156fa2a3b9c753df2de41df2 (diff) |
Merge branch 'devel-stable' into for-linus
Conflicts:
arch/arm/kernel/setup.c
arch/arm/mach-shmobile/board-kota2.c
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/time.c | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 69a61367e4b8..1ed8d1397fcf 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c | |||
@@ -12,7 +12,6 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/sched.h> | ||
16 | #include <linux/timer.h> | 15 | #include <linux/timer.h> |
17 | #include <linux/clockchips.h> | 16 | #include <linux/clockchips.h> |
18 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy; | |||
60 | * Orion's sched_clock implementation. It has a resolution of | 59 | * Orion's sched_clock implementation. It has a resolution of |
61 | * at least 7.5ns (133MHz TCLK). | 60 | * at least 7.5ns (133MHz TCLK). |
62 | */ | 61 | */ |
63 | static DEFINE_CLOCK_DATA(cd); | ||
64 | 62 | ||
65 | unsigned long long notrace sched_clock(void) | 63 | static u32 notrace orion_read_sched_clock(void) |
66 | { | 64 | { |
67 | u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); | 65 | return ~readl(timer_base + TIMER0_VAL_OFF); |
68 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
69 | } | ||
70 | |||
71 | |||
72 | static void notrace orion_update_sched_clock(void) | ||
73 | { | ||
74 | u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF); | ||
75 | update_sched_clock(&cd, cyc, (u32)~0); | ||
76 | } | ||
77 | |||
78 | static void __init setup_sched_clock(unsigned long tclk) | ||
79 | { | ||
80 | init_sched_clock(&cd, orion_update_sched_clock, 32, tclk); | ||
81 | } | 66 | } |
82 | 67 | ||
83 | /* | 68 | /* |
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, | |||
217 | /* | 202 | /* |
218 | * Set scale and timer for sched_clock. | 203 | * Set scale and timer for sched_clock. |
219 | */ | 204 | */ |
220 | setup_sched_clock(tclk); | 205 | setup_sched_clock(orion_read_sched_clock, 32, tclk); |
221 | 206 | ||
222 | /* | 207 | /* |
223 | * Setup free-running clocksource timer (interrupts | 208 | * Setup free-running clocksource timer (interrupts |