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authorLennert Buytenhek <buytenh@wantstofly.org>2009-12-23 10:19:56 -0500
committerNicolas Pitre <nico@fluxnic.net>2009-12-28 23:50:49 -0500
commit7788cd5557766d49343088b2edc544b186e2fe53 (patch)
treeee2cf8fa7858b149e8f8835aa2208cb5201eb586 /arch/arm/plat-orion/pcie.c
parent6b7b284958d47b77d06745b36bc7f36dab769d9b (diff)
[ARM] Orion: fix PCIe inbound window programming when RAM size is not a power of two
The PCIe inbound window size is supposed to be a power of two. If the total amount of RAM installed in the system is not a power of two, round it up such that it is. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/plat-orion/pcie.c')
-rw-r--r--arch/arm/plat-orion/pcie.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index d41d41d78ad9..54c84a492a0f 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -133,6 +133,12 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
133 } 133 }
134 134
135 /* 135 /*
136 * Round up 'size' to the nearest power of two.
137 */
138 if ((size & (size - 1)) != 0)
139 size = 1 << fls(size);
140
141 /*
136 * Setup BAR[1] to all DRAM banks. 142 * Setup BAR[1] to all DRAM banks.
137 */ 143 */
138 writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1)); 144 writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1));