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authorTony Lindgren <tony@atomide.com>2010-02-15 12:26:07 -0500
committerTony Lindgren <tony@atomide.com>2010-02-15 12:26:07 -0500
commitbe26a3df0b80307bf8f73cea535c112210151bb9 (patch)
tree8e3d90563b6d689ad37500929c05c211153295be /arch/arm/plat-omap
parent918cae14872c56446415299fc17cf98704c9a537 (diff)
parent61b603b4ee0c70708539e2fa5c3d47f17b7c7849 (diff)
Merge branch 'debug-ll' into omap-for-linus
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/Kconfig19
-rw-r--r--arch/arm/plat-omap/common.c29
-rw-r--r--arch/arm/plat-omap/include/plat/common.h6
-rw-r--r--arch/arm/plat-omap/include/plat/omap16xx.h74
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h70
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h181
6 files changed, 251 insertions, 128 deletions
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index e2ea04a4c8a1..484d6a91524f 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -141,25 +141,6 @@ config OMAP_DM_TIMER
141 help 141 help
142 Select this option if you want to use OMAP Dual-Mode timers. 142 Select this option if you want to use OMAP Dual-Mode timers.
143 143
144choice
145 prompt "Low-level debug console UART"
146 depends on ARCH_OMAP
147 default OMAP_LL_DEBUG_NONE
148
149config OMAP_LL_DEBUG_UART1
150 bool "UART1"
151
152config OMAP_LL_DEBUG_UART2
153 bool "UART2"
154
155config OMAP_LL_DEBUG_UART3
156 bool "UART3"
157
158config OMAP_LL_DEBUG_NONE
159 bool "None"
160
161endchoice
162
163config OMAP_SERIAL_WAKE 144config OMAP_SERIAL_WAKE
164 bool "Enable wake-up events for serial ports" 145 bool "Enable wake-up events for serial ports"
165 depends on ARCH_OMAP1 && OMAP_MUX 146 depends on ARCH_OMAP1 && OMAP_MUX
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index dddc0273bc8b..7cbc0a214aab 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -34,6 +34,7 @@
34#include <plat/control.h> 34#include <plat/control.h>
35#include <plat/mux.h> 35#include <plat/mux.h>
36#include <plat/fpga.h> 36#include <plat/fpga.h>
37#include <plat/serial.h>
37 38
38#include <plat/clock.h> 39#include <plat/clock.h>
39 40
@@ -245,6 +246,7 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
245 omap2_set_globals_sdrc(omap2_globals); 246 omap2_set_globals_sdrc(omap2_globals);
246 omap2_set_globals_control(omap2_globals); 247 omap2_set_globals_control(omap2_globals);
247 omap2_set_globals_prcm(omap2_globals); 248 omap2_set_globals_prcm(omap2_globals);
249 omap2_set_globals_uart(omap2_globals);
248} 250}
249 251
250#endif 252#endif
@@ -259,6 +261,9 @@ static struct omap_globals omap242x_globals = {
259 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE), 261 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
260 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), 262 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
261 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), 263 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
264 .uart1_phys = OMAP2_UART1_BASE,
265 .uart2_phys = OMAP2_UART2_BASE,
266 .uart3_phys = OMAP2_UART3_BASE,
262}; 267};
263 268
264void __init omap2_set_globals_242x(void) 269void __init omap2_set_globals_242x(void)
@@ -277,6 +282,9 @@ static struct omap_globals omap243x_globals = {
277 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), 282 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
278 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), 283 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
279 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), 284 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
285 .uart1_phys = OMAP2_UART1_BASE,
286 .uart2_phys = OMAP2_UART2_BASE,
287 .uart3_phys = OMAP2_UART3_BASE,
280}; 288};
281 289
282void __init omap2_set_globals_243x(void) 290void __init omap2_set_globals_243x(void)
@@ -285,9 +293,9 @@ void __init omap2_set_globals_243x(void)
285} 293}
286#endif 294#endif
287 295
288#if defined(CONFIG_ARCH_OMAP3430) 296#if defined(CONFIG_ARCH_OMAP3)
289 297
290static struct omap_globals omap343x_globals = { 298static struct omap_globals omap3_globals = {
291 .class = OMAP343X_CLASS, 299 .class = OMAP343X_CLASS,
292 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), 300 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
293 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), 301 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
@@ -295,11 +303,21 @@ static struct omap_globals omap343x_globals = {
295 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), 303 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
296 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), 304 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
297 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), 305 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
306 .uart1_phys = OMAP3_UART1_BASE,
307 .uart2_phys = OMAP3_UART2_BASE,
308 .uart3_phys = OMAP3_UART3_BASE,
298}; 309};
299 310
300void __init omap2_set_globals_343x(void) 311void __init omap2_set_globals_343x(void)
301{ 312{
302 __omap2_set_globals(&omap343x_globals); 313 __omap2_set_globals(&omap3_globals);
314}
315
316void __init omap2_set_globals_36xx(void)
317{
318 omap3_globals.uart4_phys = OMAP3_UART4_BASE;
319
320 __omap2_set_globals(&omap3_globals);
303} 321}
304#endif 322#endif
305 323
@@ -311,6 +329,10 @@ static struct omap_globals omap4_globals = {
311 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), 329 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
312 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), 330 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
313 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), 331 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
332 .uart1_phys = OMAP4_UART1_BASE,
333 .uart2_phys = OMAP4_UART2_BASE,
334 .uart3_phys = OMAP4_UART3_BASE,
335 .uart4_phys = OMAP4_UART4_BASE,
314}; 336};
315 337
316void __init omap2_set_globals_443x(void) 338void __init omap2_set_globals_443x(void)
@@ -318,6 +340,7 @@ void __init omap2_set_globals_443x(void)
318 omap2_set_globals_tap(&omap4_globals); 340 omap2_set_globals_tap(&omap4_globals);
319 omap2_set_globals_control(&omap4_globals); 341 omap2_set_globals_control(&omap4_globals);
320 omap2_set_globals_prcm(&omap4_globals); 342 omap2_set_globals_prcm(&omap4_globals);
343 omap2_set_globals_uart(&omap4_globals);
321} 344}
322#endif 345#endif
323 346
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 32c22272425d..e04a58ec53a2 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -47,11 +47,16 @@ struct omap_globals {
47 void __iomem *prm; /* Power and Reset Management */ 47 void __iomem *prm; /* Power and Reset Management */
48 void __iomem *cm; /* Clock Management */ 48 void __iomem *cm; /* Clock Management */
49 void __iomem *cm2; 49 void __iomem *cm2;
50 unsigned long uart1_phys;
51 unsigned long uart2_phys;
52 unsigned long uart3_phys;
53 unsigned long uart4_phys;
50}; 54};
51 55
52void omap2_set_globals_242x(void); 56void omap2_set_globals_242x(void);
53void omap2_set_globals_243x(void); 57void omap2_set_globals_243x(void);
54void omap2_set_globals_343x(void); 58void omap2_set_globals_343x(void);
59void omap2_set_globals_36xx(void);
55void omap2_set_globals_443x(void); 60void omap2_set_globals_443x(void);
56 61
57/* These get called from omap2_set_globals_xxxx(), do not call these */ 62/* These get called from omap2_set_globals_xxxx(), do not call these */
@@ -59,6 +64,7 @@ void omap2_set_globals_tap(struct omap_globals *);
59void omap2_set_globals_sdrc(struct omap_globals *); 64void omap2_set_globals_sdrc(struct omap_globals *);
60void omap2_set_globals_control(struct omap_globals *); 65void omap2_set_globals_control(struct omap_globals *);
61void omap2_set_globals_prcm(struct omap_globals *); 66void omap2_set_globals_prcm(struct omap_globals *);
67void omap2_set_globals_uart(struct omap_globals *);
62 68
63/** 69/**
64 * omap_test_timeout - busy-loop, testing a condition 70 * omap_test_timeout - busy-loop, testing a condition
diff --git a/arch/arm/plat-omap/include/plat/omap16xx.h b/arch/arm/plat-omap/include/plat/omap16xx.h
index 7560b4d583a3..e69e1d857b45 100644
--- a/arch/arm/plat-omap/include/plat/omap16xx.h
+++ b/arch/arm/plat-omap/include/plat/omap16xx.h
@@ -125,43 +125,43 @@
125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) 125#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160)
126 126
127/* UART3 Registers Mapping through MPU bus */ 127/* UART3 Registers Mapping through MPU bus */
128#define UART3_RHR (OMAP_UART3_BASE + 0) 128#define UART3_RHR (OMAP1_UART3_BASE + 0)
129#define UART3_THR (OMAP_UART3_BASE + 0) 129#define UART3_THR (OMAP1_UART3_BASE + 0)
130#define UART3_DLL (OMAP_UART3_BASE + 0) 130#define UART3_DLL (OMAP1_UART3_BASE + 0)
131#define UART3_IER (OMAP_UART3_BASE + 4) 131#define UART3_IER (OMAP1_UART3_BASE + 4)
132#define UART3_DLH (OMAP_UART3_BASE + 4) 132#define UART3_DLH (OMAP1_UART3_BASE + 4)
133#define UART3_IIR (OMAP_UART3_BASE + 8) 133#define UART3_IIR (OMAP1_UART3_BASE + 8)
134#define UART3_FCR (OMAP_UART3_BASE + 8) 134#define UART3_FCR (OMAP1_UART3_BASE + 8)
135#define UART3_EFR (OMAP_UART3_BASE + 8) 135#define UART3_EFR (OMAP1_UART3_BASE + 8)
136#define UART3_LCR (OMAP_UART3_BASE + 0x0C) 136#define UART3_LCR (OMAP1_UART3_BASE + 0x0C)
137#define UART3_MCR (OMAP_UART3_BASE + 0x10) 137#define UART3_MCR (OMAP1_UART3_BASE + 0x10)
138#define UART3_XON1_ADDR1 (OMAP_UART3_BASE + 0x10) 138#define UART3_XON1_ADDR1 (OMAP1_UART3_BASE + 0x10)
139#define UART3_XON2_ADDR2 (OMAP_UART3_BASE + 0x14) 139#define UART3_XON2_ADDR2 (OMAP1_UART3_BASE + 0x14)
140#define UART3_LSR (OMAP_UART3_BASE + 0x14) 140#define UART3_LSR (OMAP1_UART3_BASE + 0x14)
141#define UART3_TCR (OMAP_UART3_BASE + 0x18) 141#define UART3_TCR (OMAP1_UART3_BASE + 0x18)
142#define UART3_MSR (OMAP_UART3_BASE + 0x18) 142#define UART3_MSR (OMAP1_UART3_BASE + 0x18)
143#define UART3_XOFF1 (OMAP_UART3_BASE + 0x18) 143#define UART3_XOFF1 (OMAP1_UART3_BASE + 0x18)
144#define UART3_XOFF2 (OMAP_UART3_BASE + 0x1C) 144#define UART3_XOFF2 (OMAP1_UART3_BASE + 0x1C)
145#define UART3_SPR (OMAP_UART3_BASE + 0x1C) 145#define UART3_SPR (OMAP1_UART3_BASE + 0x1C)
146#define UART3_TLR (OMAP_UART3_BASE + 0x1C) 146#define UART3_TLR (OMAP1_UART3_BASE + 0x1C)
147#define UART3_MDR1 (OMAP_UART3_BASE + 0x20) 147#define UART3_MDR1 (OMAP1_UART3_BASE + 0x20)
148#define UART3_MDR2 (OMAP_UART3_BASE + 0x24) 148#define UART3_MDR2 (OMAP1_UART3_BASE + 0x24)
149#define UART3_SFLSR (OMAP_UART3_BASE + 0x28) 149#define UART3_SFLSR (OMAP1_UART3_BASE + 0x28)
150#define UART3_TXFLL (OMAP_UART3_BASE + 0x28) 150#define UART3_TXFLL (OMAP1_UART3_BASE + 0x28)
151#define UART3_RESUME (OMAP_UART3_BASE + 0x2C) 151#define UART3_RESUME (OMAP1_UART3_BASE + 0x2C)
152#define UART3_TXFLH (OMAP_UART3_BASE + 0x2C) 152#define UART3_TXFLH (OMAP1_UART3_BASE + 0x2C)
153#define UART3_SFREGL (OMAP_UART3_BASE + 0x30) 153#define UART3_SFREGL (OMAP1_UART3_BASE + 0x30)
154#define UART3_RXFLL (OMAP_UART3_BASE + 0x30) 154#define UART3_RXFLL (OMAP1_UART3_BASE + 0x30)
155#define UART3_SFREGH (OMAP_UART3_BASE + 0x34) 155#define UART3_SFREGH (OMAP1_UART3_BASE + 0x34)
156#define UART3_RXFLH (OMAP_UART3_BASE + 0x34) 156#define UART3_RXFLH (OMAP1_UART3_BASE + 0x34)
157#define UART3_BLR (OMAP_UART3_BASE + 0x38) 157#define UART3_BLR (OMAP1_UART3_BASE + 0x38)
158#define UART3_ACREG (OMAP_UART3_BASE + 0x3C) 158#define UART3_ACREG (OMAP1_UART3_BASE + 0x3C)
159#define UART3_DIV16 (OMAP_UART3_BASE + 0x3C) 159#define UART3_DIV16 (OMAP1_UART3_BASE + 0x3C)
160#define UART3_SCR (OMAP_UART3_BASE + 0x40) 160#define UART3_SCR (OMAP1_UART3_BASE + 0x40)
161#define UART3_SSR (OMAP_UART3_BASE + 0x44) 161#define UART3_SSR (OMAP1_UART3_BASE + 0x44)
162#define UART3_EBLR (OMAP_UART3_BASE + 0x48) 162#define UART3_EBLR (OMAP1_UART3_BASE + 0x48)
163#define UART3_OSC_12M_SEL (OMAP_UART3_BASE + 0x4C) 163#define UART3_OSC_12M_SEL (OMAP1_UART3_BASE + 0x4C)
164#define UART3_MVR (OMAP_UART3_BASE + 0x50) 164#define UART3_MVR (OMAP1_UART3_BASE + 0x50)
165 165
166/* 166/*
167 * --------------------------------------------------------------------------- 167 * ---------------------------------------------------------------------------
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index f5a4a92393ef..83dce4c4f7e6 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -15,37 +15,65 @@
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17 17
18#if defined(CONFIG_ARCH_OMAP1)
19/* OMAP1 serial ports */ 18/* OMAP1 serial ports */
20#define OMAP_UART1_BASE 0xfffb0000 19#define OMAP1_UART1_BASE 0xfffb0000
21#define OMAP_UART2_BASE 0xfffb0800 20#define OMAP1_UART2_BASE 0xfffb0800
22#define OMAP_UART3_BASE 0xfffb9800 21#define OMAP1_UART3_BASE 0xfffb9800
23#elif defined(CONFIG_ARCH_OMAP2) 22
24/* OMAP2 serial ports */ 23/* OMAP2 serial ports */
25#define OMAP_UART1_BASE 0x4806a000 24#define OMAP2_UART1_BASE 0x4806a000
26#define OMAP_UART2_BASE 0x4806c000 25#define OMAP2_UART2_BASE 0x4806c000
27#define OMAP_UART3_BASE 0x4806e000 26#define OMAP2_UART3_BASE 0x4806e000
28#elif defined(CONFIG_ARCH_OMAP3) 27
29/* OMAP3 serial ports */ 28/* OMAP3 serial ports */
30#define OMAP_UART1_BASE 0x4806a000 29#define OMAP3_UART1_BASE OMAP2_UART1_BASE
31#define OMAP_UART2_BASE 0x4806c000 30#define OMAP3_UART2_BASE OMAP2_UART2_BASE
32#define OMAP_UART3_BASE 0x49020000 31#define OMAP3_UART3_BASE 0x49020000
33#elif defined(CONFIG_ARCH_OMAP4) 32#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
33
34/* OMAP4 serial ports */ 34/* OMAP4 serial ports */
35#define OMAP_UART1_BASE 0x4806a000 35#define OMAP4_UART1_BASE OMAP2_UART1_BASE
36#define OMAP_UART2_BASE 0x4806c000 36#define OMAP4_UART2_BASE OMAP2_UART2_BASE
37#define OMAP_UART3_BASE 0x48020000 37#define OMAP4_UART3_BASE 0x48020000
38#define OMAP_UART4_BASE 0x4806e000 38#define OMAP4_UART4_BASE 0x4806e000
39#endif 39
40/* External port on Zoom2/3 */
41#define ZOOM_UART_BASE 0x10000000
42#define ZOOM_UART_VIRT 0xfb000000
43
44#define OMAP_PORT_SHIFT 2
45#define OMAP7XX_PORT_SHIFT 0
46#define ZOOM_PORT_SHIFT 1
40 47
41#define OMAP1510_BASE_BAUD (12000000/16) 48#define OMAP1510_BASE_BAUD (12000000/16)
42#define OMAP16XX_BASE_BAUD (48000000/16) 49#define OMAP16XX_BASE_BAUD (48000000/16)
43#define OMAP24XX_BASE_BAUD (48000000/16) 50#define OMAP24XX_BASE_BAUD (48000000/16)
44 51
52/*
53 * DEBUG_LL port encoding stored into the UART1 scratchpad register by
54 * decomp_setup in uncompress.h
55 */
56#define OMAP1UART1 11
57#define OMAP1UART2 12
58#define OMAP1UART3 13
59#define OMAP2UART1 21
60#define OMAP2UART2 22
61#define OMAP2UART3 23
62#define OMAP3UART1 OMAP2UART1
63#define OMAP3UART2 OMAP2UART2
64#define OMAP3UART3 33
65#define OMAP3UART4 34 /* Only on 36xx */
66#define OMAP4UART1 OMAP2UART1
67#define OMAP4UART2 OMAP2UART2
68#define OMAP4UART3 43
69#define OMAP4UART4 44
70#define ZOOM_UART 95 /* Only on zoom2/3 */
71
72/* This is only used by 8250.c for omap1510 */
45#define is_omap_port(pt) ({int __ret = 0; \ 73#define is_omap_port(pt) ({int __ret = 0; \
46 if ((pt)->port.mapbase == OMAP_UART1_BASE || \ 74 if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
47 (pt)->port.mapbase == OMAP_UART2_BASE || \ 75 (pt)->port.mapbase == OMAP1_UART2_BASE || \
48 (pt)->port.mapbase == OMAP_UART3_BASE) \ 76 (pt)->port.mapbase == OMAP1_UART3_BASE) \
49 __ret = 1; \ 77 __ret = 1; \
50 __ret; \ 78 __ret; \
51 }) 79 })
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 13c305d62127..81d9ec540fcf 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -19,62 +19,38 @@
19 19
20#include <linux/types.h> 20#include <linux/types.h>
21#include <linux/serial_reg.h> 21#include <linux/serial_reg.h>
22
23#include <asm/mach-types.h>
24
22#include <plat/serial.h> 25#include <plat/serial.h>
23 26
24unsigned int system_rev; 27static volatile u8 *uart1_base;
28static int uart1_shift;
25 29
26#define UART_OMAP_MDR1 0x08 /* mode definition register */ 30static volatile u8 *uart_base;
27#define OMAP_ID_730 0x355F 31static int uart_shift;
28#define OMAP_ID_850 0x362C
29#define ID_MASK 0x7fff
30#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
31#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
32 32
33static void putc(int c) 33/*
34 * Store the DEBUG_LL uart number into UART1 scratchpad register.
35 * See also debug-macro.S, and serial.c for related code.
36 *
37 * Please note that we currently assume that:
38 * - UART1 clocks are enabled for register access
39 * - UART1 scratchpad register can be used
40 */
41static void set_uart1_scratchpad(unsigned char port)
34{ 42{
35 volatile u8 * uart = 0; 43 uart1_base[UART_SCR << uart1_shift] = port;
36 int shift = 2; 44}
37
38#ifdef CONFIG_MACH_OMAP_PALMTE
39 return;
40#endif
41
42#ifdef CONFIG_ARCH_OMAP
43#ifdef CONFIG_OMAP_LL_DEBUG_UART3
44 uart = (volatile u8 *)(OMAP_UART3_BASE);
45#elif defined(CONFIG_OMAP_LL_DEBUG_UART2)
46 uart = (volatile u8 *)(OMAP_UART2_BASE);
47#elif defined(CONFIG_OMAP_LL_DEBUG_UART1)
48 uart = (volatile u8 *)(OMAP_UART1_BASE);
49#elif defined(CONFIG_OMAP_LL_DEBUG_NONE)
50 return;
51#else
52 return;
53#endif
54
55#ifdef CONFIG_ARCH_OMAP1
56 /* Determine which serial port to use */
57 do {
58 /* MMU is not on, so cpu_is_omapXXXX() won't work here */
59 unsigned int omap_id = omap_get_id();
60
61 if (omap_id == OMAP_ID_730 || omap_id == OMAP_ID_850)
62 shift = 0;
63 45
64 if (check_port(uart, shift)) 46static void putc(int c)
65 break; 47{
66 /* Silent boot if no serial ports are enabled. */ 48 if (!uart_base)
67 return; 49 return;
68 } while (0);
69#endif /* CONFIG_ARCH_OMAP1 */
70#endif
71 50
72 /* 51 while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
73 * Now, xmit each character
74 */
75 while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
76 barrier(); 52 barrier();
77 uart[UART_TX << shift] = c; 53 uart_base[UART_TX << uart_shift] = c;
78} 54}
79 55
80static inline void flush(void) 56static inline void flush(void)
@@ -82,7 +58,116 @@ static inline void flush(void)
82} 58}
83 59
84/* 60/*
61 * Macros to configure UART1 and debug UART
62 */
63#define _DEBUG_LL_ENTRY(mach, uart1_phys, uart1_shft, \
64 dbg_uart, dbg_shft, dbg_id) \
65 if (machine_is_##mach()) { \
66 uart1_base = (volatile u8 *)(uart1_phys); \
67 uart1_shift = (uart1_shft); \
68 uart_base = (volatile u8 *)(dbg_uart); \
69 uart_shift = (dbg_shft); \
70 port = (dbg_id); \
71 set_uart1_scratchpad(port); \
72 break; \
73 }
74
75#define DEBUG_LL_OMAP7XX(p, mach) \
76 _DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP7XX_PORT_SHIFT, \
77 OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, OMAP1UART##p)
78
79#define DEBUG_LL_OMAP1(p, mach) \
80 _DEBUG_LL_ENTRY(mach, OMAP1_UART1_BASE, OMAP_PORT_SHIFT, \
81 OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP1UART##p)
82
83#define DEBUG_LL_OMAP2(p, mach) \
84 _DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
85 OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP2UART##p)
86
87#define DEBUG_LL_OMAP3(p, mach) \
88 _DEBUG_LL_ENTRY(mach, OMAP3_UART1_BASE, OMAP_PORT_SHIFT, \
89 OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP3UART##p)
90
91#define DEBUG_LL_OMAP4(p, mach) \
92 _DEBUG_LL_ENTRY(mach, OMAP4_UART1_BASE, OMAP_PORT_SHIFT, \
93 OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, OMAP4UART##p)
94
95/* Zoom2/3 shift is different for UART1 and external port */
96#define DEBUG_LL_ZOOM(mach) \
97 _DEBUG_LL_ENTRY(mach, OMAP2_UART1_BASE, OMAP_PORT_SHIFT, \
98 ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
99
100static inline void __arch_decomp_setup(unsigned long arch_id)
101{
102 int port = 0;
103
104 /*
105 * Initialize the port based on the machine ID from the bootloader.
106 * Note that we're using macros here instead of switch statement
107 * as machine_is functions are optimized out for the boards that
108 * are not selected.
109 */
110 do {
111 /* omap7xx/8xx based boards using UART1 with shift 0 */
112 DEBUG_LL_OMAP7XX(1, herald);
113 DEBUG_LL_OMAP7XX(1, omap_perseus2);
114
115 /* omap15xx/16xx based boards using UART1 */
116 DEBUG_LL_OMAP1(1, ams_delta);
117 DEBUG_LL_OMAP1(1, nokia770);
118 DEBUG_LL_OMAP1(1, omap_h2);
119 DEBUG_LL_OMAP1(1, omap_h3);
120 DEBUG_LL_OMAP1(1, omap_innovator);
121 DEBUG_LL_OMAP1(1, omap_osk);
122 DEBUG_LL_OMAP1(1, omap_palmte);
123 DEBUG_LL_OMAP1(1, omap_palmz71);
124
125 /* omap15xx/16xx based boards using UART2 */
126 DEBUG_LL_OMAP1(2, omap_palmtt);
127
128 /* omap15xx/16xx based boards using UART3 */
129 DEBUG_LL_OMAP1(3, sx1);
130
131 /* omap2 based boards using UART1 */
132 DEBUG_LL_OMAP2(1, omap2evm);
133 DEBUG_LL_OMAP2(1, omap_2430sdp);
134 DEBUG_LL_OMAP2(1, omap_apollon);
135 DEBUG_LL_OMAP2(1, omap_h4);
136
137 /* omap2 based boards using UART3 */
138 DEBUG_LL_OMAP2(3, nokia_n800);
139 DEBUG_LL_OMAP2(3, nokia_n810);
140 DEBUG_LL_OMAP2(3, nokia_n810_wimax);
141
142 /* omap3 based boards using UART1 */
143 DEBUG_LL_OMAP2(1, omap3evm);
144 DEBUG_LL_OMAP3(1, omap_3430sdp);
145 DEBUG_LL_OMAP3(1, omap_3630sdp);
146
147 /* omap3 based boards using UART3 */
148 DEBUG_LL_OMAP3(3, cm_t35);
149 DEBUG_LL_OMAP3(3, igep0020);
150 DEBUG_LL_OMAP3(3, nokia_rx51);
151 DEBUG_LL_OMAP3(3, omap3517evm);
152 DEBUG_LL_OMAP3(3, omap3_beagle);
153 DEBUG_LL_OMAP3(3, omap3_pandora);
154 DEBUG_LL_OMAP3(3, omap_ldp);
155 DEBUG_LL_OMAP3(3, overo);
156 DEBUG_LL_OMAP3(3, touchbook);
157
158 /* omap4 based boards using UART3 */
159 DEBUG_LL_OMAP4(3, omap_4430sdp);
160
161 /* zoom2/3 external uart */
162 DEBUG_LL_ZOOM(omap_zoom2);
163 DEBUG_LL_ZOOM(omap_zoom3);
164
165 } while (0);
166}
167
168#define arch_decomp_setup() __arch_decomp_setup(arch_id)
169
170/*
85 * nothing to do 171 * nothing to do
86 */ 172 */
87#define arch_decomp_setup()
88#define arch_decomp_wdog() 173#define arch_decomp_wdog()
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 19:20:04 -0500