diff options
| author | Tony Lindgren <tony@atomide.com> | 2009-03-23 21:23:49 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2009-03-23 21:51:23 -0400 |
| commit | 828c707e6dbd0ca7882f721a466ff28729376ff0 (patch) | |
| tree | e664f72712fdef0d9cb5f517b4ee6596fa93a5b2 /arch/arm/plat-omap | |
| parent | e51151a53fc85fb1730ec4d6c1474275dcdb9ec3 (diff) | |
ARM: OMAP3: Add base address definitions and resources for OMAP 3 IS, v2
This replaces earlier patch from Sergio Aguirre titled "[REVIEW PATCH 03/14]
OMAP34XX: CAM: Resources fixes".
Signed-off-by: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/omap34xx.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h index 89173f16b9b7..1b1c35d21697 100644 --- a/arch/arm/plat-omap/include/mach/omap34xx.h +++ b/arch/arm/plat-omap/include/mach/omap34xx.h | |||
| @@ -49,6 +49,33 @@ | |||
| 49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | 49 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE |
| 50 | 50 | ||
| 51 | #define OMAP34XX_IC_BASE 0x48200000 | 51 | #define OMAP34XX_IC_BASE 0x48200000 |
| 52 | |||
| 53 | #define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) | ||
| 54 | #define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100) | ||
| 55 | #define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400) | ||
| 56 | #define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600) | ||
| 57 | #define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00) | ||
| 58 | #define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00) | ||
| 59 | #define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00) | ||
| 60 | #define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) | ||
| 61 | #define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) | ||
| 62 | #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) | ||
| 63 | #define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) | ||
| 64 | #define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) | ||
| 65 | |||
| 66 | #define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) | ||
| 67 | #define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) | ||
| 68 | #define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF) | ||
| 69 | #define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7) | ||
| 70 | #define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047) | ||
| 71 | #define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F) | ||
| 72 | #define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F) | ||
| 73 | #define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) | ||
| 74 | #define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) | ||
| 75 | #define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) | ||
| 76 | #define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) | ||
| 77 | #define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) | ||
| 78 | |||
| 52 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 | 79 | #define OMAP34XX_IVA_INTC_BASE 0x40000000 |
| 53 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | 80 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) |
| 54 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) | 81 | #define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) |