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authorAlistair Buxton <a.j.buxton@gmail.com>2009-09-22 05:02:58 -0400
committerAlistair Buxton <a.j.buxton@gmail.com>2009-10-07 18:14:06 -0400
commit7c0069264017fdac8ef017b8893f0f0d7a13851a (patch)
tree2ef9a74c5e8a19e2d7437a61f6f546a1c7e782fb /arch/arm/plat-omap
parent372b1c32e7e7d7aa5f44e0eaed4ad8ae21e4e9da (diff)
OMAP7XX: Rename all the rest of the omap730 references in omap1 core
This patch is part of a series which removes references to omap730 in code which is shared with omap850, replacing them with references to omap7xx. This updates all the remaining omap730 references in miscellaneous local variables, macros and similar. Signed-off-by: Alistair Buxton <a.j.buxton@gmail.com> Reviewed-by: Zebediah C. McClure <zmc@lurian.net>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/devices.c22
-rw-r--r--arch/arm/plat-omap/gpio.c92
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h4
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h42
4 files changed, 80 insertions, 80 deletions
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index a64b692a1bfe..d2f54753b016 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -113,17 +113,17 @@ static void omap_init_kp(void)
113 omap_cfg_reg(E19_1610_KBR4); 113 omap_cfg_reg(E19_1610_KBR4);
114 omap_cfg_reg(N19_1610_KBR5); 114 omap_cfg_reg(N19_1610_KBR5);
115 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) { 115 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
116 omap_cfg_reg(E2_730_KBR0); 116 omap_cfg_reg(E2_7XX_KBR0);
117 omap_cfg_reg(J7_730_KBR1); 117 omap_cfg_reg(J7_7XX_KBR1);
118 omap_cfg_reg(E1_730_KBR2); 118 omap_cfg_reg(E1_7XX_KBR2);
119 omap_cfg_reg(F3_730_KBR3); 119 omap_cfg_reg(F3_7XX_KBR3);
120 omap_cfg_reg(D2_730_KBR4); 120 omap_cfg_reg(D2_7XX_KBR4);
121 121
122 omap_cfg_reg(C2_730_KBC0); 122 omap_cfg_reg(C2_7XX_KBC0);
123 omap_cfg_reg(D3_730_KBC1); 123 omap_cfg_reg(D3_7XX_KBC1);
124 omap_cfg_reg(E4_730_KBC2); 124 omap_cfg_reg(E4_7XX_KBC2);
125 omap_cfg_reg(F4_730_KBC3); 125 omap_cfg_reg(F4_7XX_KBC3);
126 omap_cfg_reg(E3_730_KBC4); 126 omap_cfg_reg(E3_7XX_KBC4);
127 } else if (machine_is_omap_h4()) { 127 } else if (machine_is_omap_h4()) {
128 omap_cfg_reg(T19_24XX_KBR0); 128 omap_cfg_reg(T19_24XX_KBR0);
129 omap_cfg_reg(R19_24XX_KBR1); 129 omap_cfg_reg(R19_24XX_KBR1);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 22f6e689f5c0..b0c73613a4e9 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -68,20 +68,20 @@
68#define OMAP1610_GPIO_SET_DATAOUT 0x00f0 68#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
69 69
70/* 70/*
71 * OMAP730 specific GPIO registers 71 * OMAP7XX specific GPIO registers
72 */ 72 */
73#define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) 73#define OMAP7XX_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000)
74#define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) 74#define OMAP7XX_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800)
75#define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) 75#define OMAP7XX_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000)
76#define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) 76#define OMAP7XX_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800)
77#define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) 77#define OMAP7XX_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000)
78#define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) 78#define OMAP7XX_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800)
79#define OMAP730_GPIO_DATA_INPUT 0x00 79#define OMAP7XX_GPIO_DATA_INPUT 0x00
80#define OMAP730_GPIO_DATA_OUTPUT 0x04 80#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
81#define OMAP730_GPIO_DIR_CONTROL 0x08 81#define OMAP7XX_GPIO_DIR_CONTROL 0x08
82#define OMAP730_GPIO_INT_CONTROL 0x0c 82#define OMAP7XX_GPIO_INT_CONTROL 0x0c
83#define OMAP730_GPIO_INT_MASK 0x10 83#define OMAP7XX_GPIO_INT_MASK 0x10
84#define OMAP730_GPIO_INT_STATUS 0x14 84#define OMAP7XX_GPIO_INT_STATUS 0x14
85 85
86#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE) 86#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
87 87
@@ -199,7 +199,7 @@ struct gpio_bank {
199#define METHOD_MPUIO 0 199#define METHOD_MPUIO 0
200#define METHOD_GPIO_1510 1 200#define METHOD_GPIO_1510 1
201#define METHOD_GPIO_1610 2 201#define METHOD_GPIO_1610 2
202#define METHOD_GPIO_730 3 202#define METHOD_GPIO_7XX 3
203#define METHOD_GPIO_24XX 5 203#define METHOD_GPIO_24XX 5
204 204
205#ifdef CONFIG_ARCH_OMAP16XX 205#ifdef CONFIG_ARCH_OMAP16XX
@@ -220,14 +220,14 @@ static struct gpio_bank gpio_bank_1510[2] = {
220#endif 220#endif
221 221
222#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 222#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
223static struct gpio_bank gpio_bank_730[7] = { 223static struct gpio_bank gpio_bank_7xx[7] = {
224 { OMAP1_MPUIO_VBASE, INT_7XX_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 224 { OMAP1_MPUIO_VBASE, INT_7XX_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
225 { OMAP730_GPIO1_BASE, INT_7XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, 225 { OMAP7XX_GPIO1_BASE, INT_7XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_7XX },
226 { OMAP730_GPIO2_BASE, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, 226 { OMAP7XX_GPIO2_BASE, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_7XX },
227 { OMAP730_GPIO3_BASE, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, 227 { OMAP7XX_GPIO3_BASE, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_7XX },
228 { OMAP730_GPIO4_BASE, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 }, 228 { OMAP7XX_GPIO4_BASE, INT_7XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_7XX },
229 { OMAP730_GPIO5_BASE, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 }, 229 { OMAP7XX_GPIO5_BASE, INT_7XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_7XX },
230 { OMAP730_GPIO6_BASE, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 }, 230 { OMAP7XX_GPIO6_BASE, INT_7XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_7XX },
231}; 231};
232#endif 232#endif
233 233
@@ -373,8 +373,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
373 break; 373 break;
374#endif 374#endif
375#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 375#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
376 case METHOD_GPIO_730: 376 case METHOD_GPIO_7XX:
377 reg += OMAP730_GPIO_DIR_CONTROL; 377 reg += OMAP7XX_GPIO_DIR_CONTROL;
378 break; 378 break;
379#endif 379#endif
380#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 380#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -435,8 +435,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
435 break; 435 break;
436#endif 436#endif
437#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 437#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
438 case METHOD_GPIO_730: 438 case METHOD_GPIO_7XX:
439 reg += OMAP730_GPIO_DATA_OUTPUT; 439 reg += OMAP7XX_GPIO_DATA_OUTPUT;
440 l = __raw_readl(reg); 440 l = __raw_readl(reg);
441 if (enable) 441 if (enable)
442 l |= 1 << gpio; 442 l |= 1 << gpio;
@@ -493,8 +493,8 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
493 break; 493 break;
494#endif 494#endif
495#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 495#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
496 case METHOD_GPIO_730: 496 case METHOD_GPIO_7XX:
497 reg += OMAP730_GPIO_DATA_INPUT; 497 reg += OMAP7XX_GPIO_DATA_INPUT;
498 break; 498 break;
499#endif 499#endif
500#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 500#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -539,8 +539,8 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
539 break; 539 break;
540#endif 540#endif
541#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 541#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
542 case METHOD_GPIO_730: 542 case METHOD_GPIO_7XX:
543 reg += OMAP730_GPIO_DATA_OUTPUT; 543 reg += OMAP7XX_GPIO_DATA_OUTPUT;
544 break; 544 break;
545#endif 545#endif
546#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 546#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
@@ -743,8 +743,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
743 break; 743 break;
744#endif 744#endif
745#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 745#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
746 case METHOD_GPIO_730: 746 case METHOD_GPIO_7XX:
747 reg += OMAP730_GPIO_INT_CONTROL; 747 reg += OMAP7XX_GPIO_INT_CONTROL;
748 l = __raw_readl(reg); 748 l = __raw_readl(reg);
749 if (trigger & IRQ_TYPE_EDGE_RISING) 749 if (trigger & IRQ_TYPE_EDGE_RISING)
750 l |= 1 << gpio; 750 l |= 1 << gpio;
@@ -831,8 +831,8 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
831 break; 831 break;
832#endif 832#endif
833#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 833#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
834 case METHOD_GPIO_730: 834 case METHOD_GPIO_7XX:
835 reg += OMAP730_GPIO_INT_STATUS; 835 reg += OMAP7XX_GPIO_INT_STATUS;
836 break; 836 break;
837#endif 837#endif
838#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 838#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
@@ -900,8 +900,8 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
900 break; 900 break;
901#endif 901#endif
902#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 902#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
903 case METHOD_GPIO_730: 903 case METHOD_GPIO_7XX:
904 reg += OMAP730_GPIO_INT_MASK; 904 reg += OMAP7XX_GPIO_INT_MASK;
905 mask = 0xffffffff; 905 mask = 0xffffffff;
906 inv = 1; 906 inv = 1;
907 break; 907 break;
@@ -966,8 +966,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
966 break; 966 break;
967#endif 967#endif
968#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 968#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
969 case METHOD_GPIO_730: 969 case METHOD_GPIO_7XX:
970 reg += OMAP730_GPIO_INT_MASK; 970 reg += OMAP7XX_GPIO_INT_MASK;
971 l = __raw_readl(reg); 971 l = __raw_readl(reg);
972 if (enable) 972 if (enable)
973 l &= ~(gpio_mask); 973 l &= ~(gpio_mask);
@@ -1161,8 +1161,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1161 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1; 1161 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
1162#endif 1162#endif
1163#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 1163#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
1164 if (bank->method == METHOD_GPIO_730) 1164 if (bank->method == METHOD_GPIO_7XX)
1165 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS; 1165 isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS;
1166#endif 1166#endif
1167#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1167#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1168 if (bank->method == METHOD_GPIO_24XX) 1168 if (bank->method == METHOD_GPIO_24XX)
@@ -1431,8 +1431,8 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
1431 case METHOD_GPIO_1610: 1431 case METHOD_GPIO_1610:
1432 reg += OMAP1610_GPIO_DIRECTION; 1432 reg += OMAP1610_GPIO_DIRECTION;
1433 break; 1433 break;
1434 case METHOD_GPIO_730: 1434 case METHOD_GPIO_7XX:
1435 reg += OMAP730_GPIO_DIR_CONTROL; 1435 reg += OMAP7XX_GPIO_DIR_CONTROL;
1436 break; 1436 break;
1437 case METHOD_GPIO_24XX: 1437 case METHOD_GPIO_24XX:
1438 reg += OMAP24XX_GPIO_OE; 1438 reg += OMAP24XX_GPIO_OE;
@@ -1603,7 +1603,7 @@ static int __init _omap_gpio_init(void)
1603 if (cpu_is_omap7xx()) { 1603 if (cpu_is_omap7xx()) {
1604 printk(KERN_INFO "OMAP7XX GPIO hardware\n"); 1604 printk(KERN_INFO "OMAP7XX GPIO hardware\n");
1605 gpio_bank_count = 7; 1605 gpio_bank_count = 7;
1606 gpio_bank = gpio_bank_730; 1606 gpio_bank = gpio_bank_7xx;
1607 } 1607 }
1608#endif 1608#endif
1609#ifdef CONFIG_ARCH_OMAP24XX 1609#ifdef CONFIG_ARCH_OMAP24XX
@@ -1664,11 +1664,11 @@ static int __init _omap_gpio_init(void)
1664 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1); 1664 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
1665 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG); 1665 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
1666 } 1666 }
1667 if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) { 1667 if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
1668 __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK); 1668 __raw_writel(0xffffffff, bank->base + OMAP7XX_GPIO_INT_MASK);
1669 __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS); 1669 __raw_writel(0x00000000, bank->base + OMAP7XX_GPIO_INT_STATUS);
1670 1670
1671 gpio_count = 32; /* 730 has 32-bit GPIOs */ 1671 gpio_count = 32; /* 7xx has 32-bit GPIOs */
1672 } 1672 }
1673 1673
1674#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1674#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 0b476b909aa8..7e9cae3e3d15 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -30,8 +30,8 @@
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/clock.h> 31#include <mach/clock.h>
32 32
33#define OMAP730_MCBSP1_BASE 0xfffb1000 33#define OMAP7XX_MCBSP1_BASE 0xfffb1000
34#define OMAP730_MCBSP2_BASE 0xfffb1800 34#define OMAP7XX_MCBSP2_BASE 0xfffb1800
35 35
36#define OMAP1510_MCBSP1_BASE 0xe1011800 36#define OMAP1510_MCBSP1_BASE 0xe1011800
37#define OMAP1510_MCBSP2_BASE 0xfffb1000 37#define OMAP1510_MCBSP2_BASE 0xfffb1000
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 66ae302f0c0f..f3c1d8a90456 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -51,12 +51,12 @@
51 .pu_pd_reg = PU_PD_SEL_##reg, \ 51 .pu_pd_reg = PU_PD_SEL_##reg, \
52 .pu_pd_val = status, 52 .pu_pd_val = status,
53 53
54#define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ 54#define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \
55 .mux_reg = OMAP7XX_IO_CONF_##reg, \ 55 .mux_reg = OMAP7XX_IO_CONF_##reg, \
56 .mask_offset = mode_offset, \ 56 .mask_offset = mode_offset, \
57 .mask = mode, 57 .mask = mode,
58 58
59#define PULL_REG_730(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \ 59#define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \
60 .pull_reg = OMAP7XX_IO_CONF_##reg, \ 60 .pull_reg = OMAP7XX_IO_CONF_##reg, \
61 .pull_bit = bit, \ 61 .pull_bit = bit, \
62 .pull_val = status, 62 .pull_val = status,
@@ -74,12 +74,12 @@
74#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ 74#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
75 .pu_pd_val = status, 75 .pu_pd_val = status,
76 76
77#define MUX_REG_730(reg, mode_offset, mode) \ 77#define MUX_REG_7XX(reg, mode_offset, mode) \
78 .mux_reg = OMAP7XX_IO_CONF_##reg, \ 78 .mux_reg = OMAP7XX_IO_CONF_##reg, \
79 .mask_offset = mode_offset, \ 79 .mask_offset = mode_offset, \
80 .mask = mode, 80 .mask = mode,
81 81
82#define PULL_REG_730(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \ 82#define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \
83 .pull_bit = bit, \ 83 .pull_bit = bit, \
84 .pull_val = status, 84 .pull_val = status,
85 85
@@ -104,13 +104,13 @@
104 * - for pull-up/down, only has one enable bit which is is in the same register 104 * - for pull-up/down, only has one enable bit which is is in the same register
105 * as mux config 105 * as mux config
106 */ 106 */
107#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ 107#define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
108 pull_bit, pull_status, debug_status)\ 108 pull_bit, pull_status, debug_status)\
109{ \ 109{ \
110 .name = desc, \ 110 .name = desc, \
111 .debug = debug_status, \ 111 .debug = debug_status, \
112 MUX_REG_730(mux_reg, mode_offset, mode) \ 112 MUX_REG_7XX(mux_reg, mode_offset, mode) \
113 PULL_REG_730(mux_reg, pull_bit, pull_status) \ 113 PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
114 PU_PD_REG(NA, 0) \ 114 PU_PD_REG(NA, 0) \
115}, 115},
116 116
@@ -202,23 +202,23 @@ struct pin_config {
202 202
203}; 203};
204 204
205enum omap730_index { 205enum omap7xx_index {
206 /* OMAP 730 keyboard */ 206 /* OMAP 730 keyboard */
207 E2_730_KBR0, 207 E2_7XX_KBR0,
208 J7_730_KBR1, 208 J7_7XX_KBR1,
209 E1_730_KBR2, 209 E1_7XX_KBR2,
210 F3_730_KBR3, 210 F3_7XX_KBR3,
211 D2_730_KBR4, 211 D2_7XX_KBR4,
212 C2_730_KBC0, 212 C2_7XX_KBC0,
213 D3_730_KBC1, 213 D3_7XX_KBC1,
214 E4_730_KBC2, 214 E4_7XX_KBC2,
215 F4_730_KBC3, 215 F4_7XX_KBC3,
216 E3_730_KBC4, 216 E3_7XX_KBC4,
217 217
218 /* USB */ 218 /* USB */
219 AA17_730_USB_DM, 219 AA17_7XX_USB_DM,
220 W16_730_USB_PU_EN, 220 W16_7XX_USB_PU_EN,
221 W17_730_USB_VBUSI, 221 W17_7XX_USB_VBUSI,
222}; 222};
223 223
224enum omap1xxx_index { 224enum omap1xxx_index {