diff options
author | Tony Lindgren <tony@atomide.com> | 2012-10-17 14:21:34 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-10-17 14:21:34 -0400 |
commit | 6832c95599e1a04f4b56b533718d1cda4689aec2 (patch) | |
tree | 3faf1a2a744245501c1743c909527d83bbb6666a /arch/arm/plat-omap | |
parent | 46cddc01aa6a017193ae7320ef8bfc8242782a66 (diff) | |
parent | 3e6ece13d966a20a38ee7adfac452a47455ccd7a (diff) |
Merge branch 'omap-for-v3.8/cleanup-headers-dss' into omap-for-v3.8/cleanup-headers
Conflicts:
arch/arm/mach-omap2/board-omap3logic.c
arch/arm/mach-omap2/gpmc.c
drivers/media/platform/omap/omap_vout.c
drivers/media/platform/omap/omap_vout_vrfb.c
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/fb.c | 61 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/sdrc.h | 164 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/vrfb.h | 66 |
3 files changed, 61 insertions, 230 deletions
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index bcbb9d5dc293..f868caeedfd6 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c | |||
@@ -33,6 +33,67 @@ | |||
33 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | 35 | ||
36 | #include <plat/cpu.h> | ||
37 | |||
38 | #ifdef CONFIG_OMAP2_VRFB | ||
39 | |||
40 | /* | ||
41 | * The first memory resource is the register region for VRFB, | ||
42 | * the rest are VRFB virtual memory areas for each VRFB context. | ||
43 | */ | ||
44 | |||
45 | static const struct resource omap2_vrfb_resources[] = { | ||
46 | DEFINE_RES_MEM_NAMED(0x68008000u, 0x40, "vrfb-regs"), | ||
47 | DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"), | ||
48 | DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"), | ||
49 | DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"), | ||
50 | DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"), | ||
51 | }; | ||
52 | |||
53 | static const struct resource omap3_vrfb_resources[] = { | ||
54 | DEFINE_RES_MEM_NAMED(0x6C000180u, 0xc0, "vrfb-regs"), | ||
55 | DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"), | ||
56 | DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"), | ||
57 | DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"), | ||
58 | DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"), | ||
59 | DEFINE_RES_MEM_NAMED(0xe0000000u, 0x4000000, "vrfb-area-4"), | ||
60 | DEFINE_RES_MEM_NAMED(0xe4000000u, 0x4000000, "vrfb-area-5"), | ||
61 | DEFINE_RES_MEM_NAMED(0xe8000000u, 0x4000000, "vrfb-area-6"), | ||
62 | DEFINE_RES_MEM_NAMED(0xec000000u, 0x4000000, "vrfb-area-7"), | ||
63 | DEFINE_RES_MEM_NAMED(0xf0000000u, 0x4000000, "vrfb-area-8"), | ||
64 | DEFINE_RES_MEM_NAMED(0xf4000000u, 0x4000000, "vrfb-area-9"), | ||
65 | DEFINE_RES_MEM_NAMED(0xf8000000u, 0x4000000, "vrfb-area-10"), | ||
66 | DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"), | ||
67 | }; | ||
68 | |||
69 | static int __init omap_init_vrfb(void) | ||
70 | { | ||
71 | struct platform_device *pdev; | ||
72 | const struct resource *res; | ||
73 | unsigned int num_res; | ||
74 | |||
75 | if (cpu_is_omap24xx()) { | ||
76 | res = omap2_vrfb_resources; | ||
77 | num_res = ARRAY_SIZE(omap2_vrfb_resources); | ||
78 | } else if (cpu_is_omap34xx()) { | ||
79 | res = omap3_vrfb_resources; | ||
80 | num_res = ARRAY_SIZE(omap3_vrfb_resources); | ||
81 | } else { | ||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | pdev = platform_device_register_resndata(NULL, "omapvrfb", -1, | ||
86 | res, num_res, NULL, 0); | ||
87 | |||
88 | if (IS_ERR(pdev)) | ||
89 | return PTR_ERR(pdev); | ||
90 | else | ||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | arch_initcall(omap_init_vrfb); | ||
95 | #endif | ||
96 | |||
36 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) | 97 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) |
37 | 98 | ||
38 | static bool omapfb_lcd_configured; | 99 | static bool omapfb_lcd_configured; |
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h deleted file mode 100644 index 36d6a7666216..000000000000 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ /dev/null | |||
@@ -1,164 +0,0 @@ | |||
1 | #ifndef ____ASM_ARCH_SDRC_H | ||
2 | #define ____ASM_ARCH_SDRC_H | ||
3 | |||
4 | /* | ||
5 | * OMAP2/3 SDRC/SMS register definitions | ||
6 | * | ||
7 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | ||
8 | * Copyright (C) 2007-2008 Nokia Corporation | ||
9 | * | ||
10 | * Tony Lindgren | ||
11 | * Paul Walmsley | ||
12 | * Richard Woodruff | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License version 2 as | ||
16 | * published by the Free Software Foundation. | ||
17 | */ | ||
18 | |||
19 | |||
20 | /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ | ||
21 | |||
22 | #define SDRC_SYSCONFIG 0x010 | ||
23 | #define SDRC_CS_CFG 0x040 | ||
24 | #define SDRC_SHARING 0x044 | ||
25 | #define SDRC_ERR_TYPE 0x04C | ||
26 | #define SDRC_DLLA_CTRL 0x060 | ||
27 | #define SDRC_DLLA_STATUS 0x064 | ||
28 | #define SDRC_DLLB_CTRL 0x068 | ||
29 | #define SDRC_DLLB_STATUS 0x06C | ||
30 | #define SDRC_POWER 0x070 | ||
31 | #define SDRC_MCFG_0 0x080 | ||
32 | #define SDRC_MR_0 0x084 | ||
33 | #define SDRC_EMR2_0 0x08c | ||
34 | #define SDRC_ACTIM_CTRL_A_0 0x09c | ||
35 | #define SDRC_ACTIM_CTRL_B_0 0x0a0 | ||
36 | #define SDRC_RFR_CTRL_0 0x0a4 | ||
37 | #define SDRC_MANUAL_0 0x0a8 | ||
38 | #define SDRC_MCFG_1 0x0B0 | ||
39 | #define SDRC_MR_1 0x0B4 | ||
40 | #define SDRC_EMR2_1 0x0BC | ||
41 | #define SDRC_ACTIM_CTRL_A_1 0x0C4 | ||
42 | #define SDRC_ACTIM_CTRL_B_1 0x0C8 | ||
43 | #define SDRC_RFR_CTRL_1 0x0D4 | ||
44 | #define SDRC_MANUAL_1 0x0D8 | ||
45 | |||
46 | #define SDRC_POWER_AUTOCOUNT_SHIFT 8 | ||
47 | #define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT) | ||
48 | #define SDRC_POWER_CLKCTRL_SHIFT 4 | ||
49 | #define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT) | ||
50 | #define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT) | ||
51 | |||
52 | /* | ||
53 | * These values represent the number of memory clock cycles between | ||
54 | * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 | ||
55 | * rows per device, and include a subtraction of a 50 cycle window in the | ||
56 | * event that the autorefresh command is delayed due to other SDRC activity. | ||
57 | * The '| 1' sets the ARE field to send one autorefresh when the autorefresh | ||
58 | * counter reaches 0. | ||
59 | * | ||
60 | * These represent optimal values for common parts, it won't work for all. | ||
61 | * As long as you scale down, most parameters are still work, they just | ||
62 | * become sub-optimal. The RFR value goes in the opposite direction. If you | ||
63 | * don't adjust it down as your clock period increases the refresh interval | ||
64 | * will not be met. Setting all parameters for complete worst case may work, | ||
65 | * but may cut memory performance by 2x. Due to errata the DLLs need to be | ||
66 | * unlocked and their value needs run time calibration. A dynamic call is | ||
67 | * need for that as no single right value exists acorss production samples. | ||
68 | * | ||
69 | * Only the FULL speed values are given. Current code is such that rate | ||
70 | * changes must be made at DPLLoutx2. The actual value adjustment for low | ||
71 | * frequency operation will be handled by omap_set_performance() | ||
72 | * | ||
73 | * By having the boot loader boot up in the fastest L4 speed available likely | ||
74 | * will result in something which you can switch between. | ||
75 | */ | ||
76 | #define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1) | ||
77 | #define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) | ||
78 | #define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) | ||
79 | #define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */ | ||
80 | #define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */ | ||
81 | |||
82 | |||
83 | /* | ||
84 | * SMS register access | ||
85 | */ | ||
86 | |||
87 | #define OMAP242X_SMS_REGADDR(reg) \ | ||
88 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg) | ||
89 | #define OMAP243X_SMS_REGADDR(reg) \ | ||
90 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg) | ||
91 | #define OMAP343X_SMS_REGADDR(reg) \ | ||
92 | (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg) | ||
93 | |||
94 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ | ||
95 | |||
96 | #define SMS_SYSCONFIG 0x010 | ||
97 | #define SMS_ROT_CONTROL(context) (0x180 + 0x10 * context) | ||
98 | #define SMS_ROT_SIZE(context) (0x184 + 0x10 * context) | ||
99 | #define SMS_ROT_PHYSICAL_BA(context) (0x188 + 0x10 * context) | ||
100 | /* REVISIT: fill in other SMS registers here */ | ||
101 | |||
102 | |||
103 | #ifndef __ASSEMBLER__ | ||
104 | |||
105 | /** | ||
106 | * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate | ||
107 | * @rate: SDRC clock rate (in Hz) | ||
108 | * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate | ||
109 | * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate | ||
110 | * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate | ||
111 | * @mr: Value to program to SDRC_MR for this rate | ||
112 | * | ||
113 | * This structure holds a pre-computed set of register values for the | ||
114 | * SDRC for a given SDRC clock rate and SDRAM chip. These are | ||
115 | * intended to be pre-computed and specified in an array in the board-*.c | ||
116 | * files. The structure is keyed off the 'rate' field. | ||
117 | */ | ||
118 | struct omap_sdrc_params { | ||
119 | unsigned long rate; | ||
120 | u32 actim_ctrla; | ||
121 | u32 actim_ctrlb; | ||
122 | u32 rfr_ctrl; | ||
123 | u32 mr; | ||
124 | }; | ||
125 | |||
126 | #ifdef CONFIG_SOC_HAS_OMAP2_SDRC | ||
127 | void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | ||
128 | struct omap_sdrc_params *sdrc_cs1); | ||
129 | #else | ||
130 | static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | ||
131 | struct omap_sdrc_params *sdrc_cs1) {}; | ||
132 | #endif | ||
133 | |||
134 | int omap2_sdrc_get_params(unsigned long r, | ||
135 | struct omap_sdrc_params **sdrc_cs0, | ||
136 | struct omap_sdrc_params **sdrc_cs1); | ||
137 | void omap2_sms_save_context(void); | ||
138 | void omap2_sms_restore_context(void); | ||
139 | |||
140 | void omap2_sms_write_rot_control(u32 val, unsigned ctx); | ||
141 | void omap2_sms_write_rot_size(u32 val, unsigned ctx); | ||
142 | void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx); | ||
143 | |||
144 | #ifdef CONFIG_ARCH_OMAP2 | ||
145 | |||
146 | struct memory_timings { | ||
147 | u32 m_type; /* ddr = 1, sdr = 0 */ | ||
148 | u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */ | ||
149 | u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */ | ||
150 | u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */ | ||
151 | u32 base_cs; /* base chip select to use for calculations */ | ||
152 | }; | ||
153 | |||
154 | extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode); | ||
155 | struct omap_sdrc_params *rx51_get_sdram_timings(void); | ||
156 | |||
157 | u32 omap2xxx_sdrc_dll_is_unlocked(void); | ||
158 | u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); | ||
159 | |||
160 | #endif /* CONFIG_ARCH_OMAP2 */ | ||
161 | |||
162 | #endif /* __ASSEMBLER__ */ | ||
163 | |||
164 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/arch/arm/plat-omap/include/plat/vrfb.h deleted file mode 100644 index 3792bdea2f6d..000000000000 --- a/arch/arm/plat-omap/include/plat/vrfb.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | /* | ||
2 | * VRFB Rotation Engine | ||
3 | * | ||
4 | * Copyright (C) 2009 Nokia Corporation | ||
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | #ifndef __OMAP_VRFB_H__ | ||
22 | #define __OMAP_VRFB_H__ | ||
23 | |||
24 | #define OMAP_VRFB_LINE_LEN 2048 | ||
25 | |||
26 | struct vrfb { | ||
27 | u8 context; | ||
28 | void __iomem *vaddr[4]; | ||
29 | unsigned long paddr[4]; | ||
30 | u16 xres; | ||
31 | u16 yres; | ||
32 | u16 xoffset; | ||
33 | u16 yoffset; | ||
34 | u8 bytespp; | ||
35 | bool yuv_mode; | ||
36 | }; | ||
37 | |||
38 | #ifdef CONFIG_OMAP2_VRFB | ||
39 | extern int omap_vrfb_request_ctx(struct vrfb *vrfb); | ||
40 | extern void omap_vrfb_release_ctx(struct vrfb *vrfb); | ||
41 | extern void omap_vrfb_adjust_size(u16 *width, u16 *height, | ||
42 | u8 bytespp); | ||
43 | extern u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp); | ||
44 | extern u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp); | ||
45 | extern void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, | ||
46 | u16 width, u16 height, | ||
47 | unsigned bytespp, bool yuv_mode); | ||
48 | extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot); | ||
49 | extern void omap_vrfb_restore_context(void); | ||
50 | |||
51 | #else | ||
52 | static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; } | ||
53 | static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {} | ||
54 | static inline void omap_vrfb_adjust_size(u16 *width, u16 *height, | ||
55 | u8 bytespp) {} | ||
56 | static inline u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp) | ||
57 | { return 0; } | ||
58 | static inline u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp) | ||
59 | { return 0; } | ||
60 | static inline void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, | ||
61 | u16 width, u16 height, unsigned bytespp, bool yuv_mode) {} | ||
62 | static inline int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot) | ||
63 | { return 0; } | ||
64 | static inline void omap_vrfb_restore_context(void) {} | ||
65 | #endif | ||
66 | #endif /* __VRFB_H */ | ||