diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-07-03 15:56:23 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-03 15:56:23 -0400 |
commit | 5351da96bd6662d28c41a3e9e652019a11f3cf7c (patch) | |
tree | a7c102be99924b1ffc7b0210dab368679e6ea0ef /arch/arm/plat-omap | |
parent | 6887a4131da3adaab011613776d865f4bcfb5678 (diff) | |
parent | c59b537d87068be8c357a0150f6172a2dc8cdf82 (diff) |
Merge tag 'omap-devel-dmtimer-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/timer
From Tony Lindgren <tony@atomide.com>:
Here are some omap dmtimer changes to make it easier to add
device tree support for dmtimer by simplifying the platform
data structure used by dmtimr.
* tag 'omap-devel-dmtimer-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Simplify dmtimer clock aliases
ARM: OMAP2+: Move dmtimer clock set function to dmtimer driver
ARM: OMAP1: Fix dmtimer support
ARM: OMAP: Add flag to indicate if a timer needs a manual reset
ARM: OMAP: Remove timer function pointer for context loss counter
ARM: OMAP: Remove loses_context variable from timer platform data
ARM: OMAP2+: Fix external clock support for dmtimers
ARM: OMAP2+: HWMOD: Correct timer device attributes
ARM: OMAP: Add DMTIMER capability variable to represent timer features
ARM: OMAP2+: Add dmtimer platform function to reserve systimers
ARM: OMAP2+: Remove unused max number of timers definition
ARM: OMAP: Remove unnecessary clk structure
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/dmtimer.c | 111 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/dmtimer.h | 22 |
2 files changed, 91 insertions, 42 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 3b0cfeb33d05..54ed4e6e429e 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -42,9 +42,11 @@ | |||
42 | #include <linux/pm_runtime.h> | 42 | #include <linux/pm_runtime.h> |
43 | 43 | ||
44 | #include <plat/dmtimer.h> | 44 | #include <plat/dmtimer.h> |
45 | #include <plat/omap-pm.h> | ||
45 | 46 | ||
46 | #include <mach/hardware.h> | 47 | #include <mach/hardware.h> |
47 | 48 | ||
49 | static u32 omap_reserved_systimers; | ||
48 | static LIST_HEAD(omap_timer_list); | 50 | static LIST_HEAD(omap_timer_list); |
49 | static DEFINE_SPINLOCK(dm_timer_lock); | 51 | static DEFINE_SPINLOCK(dm_timer_lock); |
50 | 52 | ||
@@ -133,17 +135,22 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) | |||
133 | 135 | ||
134 | int omap_dm_timer_prepare(struct omap_dm_timer *timer) | 136 | int omap_dm_timer_prepare(struct omap_dm_timer *timer) |
135 | { | 137 | { |
136 | struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; | ||
137 | int ret; | 138 | int ret; |
138 | 139 | ||
139 | timer->fclk = clk_get(&timer->pdev->dev, "fck"); | 140 | /* |
140 | if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { | 141 | * FIXME: OMAP1 devices do not use the clock framework for dmtimers so |
141 | timer->fclk = NULL; | 142 | * do not call clk_get() for these devices. |
142 | dev_err(&timer->pdev->dev, ": No fclk handle.\n"); | 143 | */ |
143 | return -EINVAL; | 144 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
145 | timer->fclk = clk_get(&timer->pdev->dev, "fck"); | ||
146 | if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { | ||
147 | timer->fclk = NULL; | ||
148 | dev_err(&timer->pdev->dev, ": No fclk handle.\n"); | ||
149 | return -EINVAL; | ||
150 | } | ||
144 | } | 151 | } |
145 | 152 | ||
146 | if (pdata->needs_manual_reset) | 153 | if (timer->capability & OMAP_TIMER_NEEDS_RESET) |
147 | omap_dm_timer_reset(timer); | 154 | omap_dm_timer_reset(timer); |
148 | 155 | ||
149 | ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); | 156 | ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); |
@@ -152,6 +159,21 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer) | |||
152 | return ret; | 159 | return ret; |
153 | } | 160 | } |
154 | 161 | ||
162 | static inline u32 omap_dm_timer_reserved_systimer(int id) | ||
163 | { | ||
164 | return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0; | ||
165 | } | ||
166 | |||
167 | int omap_dm_timer_reserve_systimer(int id) | ||
168 | { | ||
169 | if (omap_dm_timer_reserved_systimer(id)) | ||
170 | return -ENODEV; | ||
171 | |||
172 | omap_reserved_systimers |= (1 << (id - 1)); | ||
173 | |||
174 | return 0; | ||
175 | } | ||
176 | |||
155 | struct omap_dm_timer *omap_dm_timer_request(void) | 177 | struct omap_dm_timer *omap_dm_timer_request(void) |
156 | { | 178 | { |
157 | struct omap_dm_timer *timer = NULL, *t; | 179 | struct omap_dm_timer *timer = NULL, *t; |
@@ -325,10 +347,9 @@ int omap_dm_timer_start(struct omap_dm_timer *timer) | |||
325 | 347 | ||
326 | omap_dm_timer_enable(timer); | 348 | omap_dm_timer_enable(timer); |
327 | 349 | ||
328 | if (timer->loses_context) { | 350 | if (!(timer->capability & OMAP_TIMER_ALWON)) { |
329 | u32 ctx_loss_cnt_after = | 351 | if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != |
330 | timer->get_context_loss_count(&timer->pdev->dev); | 352 | timer->ctx_loss_count) |
331 | if (ctx_loss_cnt_after != timer->ctx_loss_count) | ||
332 | omap_timer_restore_context(timer); | 353 | omap_timer_restore_context(timer); |
333 | } | 354 | } |
334 | 355 | ||
@@ -347,20 +368,18 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); | |||
347 | int omap_dm_timer_stop(struct omap_dm_timer *timer) | 368 | int omap_dm_timer_stop(struct omap_dm_timer *timer) |
348 | { | 369 | { |
349 | unsigned long rate = 0; | 370 | unsigned long rate = 0; |
350 | struct dmtimer_platform_data *pdata; | ||
351 | 371 | ||
352 | if (unlikely(!timer)) | 372 | if (unlikely(!timer)) |
353 | return -EINVAL; | 373 | return -EINVAL; |
354 | 374 | ||
355 | pdata = timer->pdev->dev.platform_data; | 375 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) |
356 | if (!pdata->needs_manual_reset) | ||
357 | rate = clk_get_rate(timer->fclk); | 376 | rate = clk_get_rate(timer->fclk); |
358 | 377 | ||
359 | __omap_dm_timer_stop(timer, timer->posted, rate); | 378 | __omap_dm_timer_stop(timer, timer->posted, rate); |
360 | 379 | ||
361 | if (timer->loses_context && timer->get_context_loss_count) | 380 | if (!(timer->capability & OMAP_TIMER_ALWON)) |
362 | timer->ctx_loss_count = | 381 | timer->ctx_loss_count = |
363 | timer->get_context_loss_count(&timer->pdev->dev); | 382 | omap_pm_get_dev_context_loss_count(&timer->pdev->dev); |
364 | 383 | ||
365 | /* | 384 | /* |
366 | * Since the register values are computed and written within | 385 | * Since the register values are computed and written within |
@@ -378,6 +397,8 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop); | |||
378 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | 397 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) |
379 | { | 398 | { |
380 | int ret; | 399 | int ret; |
400 | char *parent_name = NULL; | ||
401 | struct clk *fclk, *parent; | ||
381 | struct dmtimer_platform_data *pdata; | 402 | struct dmtimer_platform_data *pdata; |
382 | 403 | ||
383 | if (unlikely(!timer)) | 404 | if (unlikely(!timer)) |
@@ -388,7 +409,49 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | |||
388 | if (source < 0 || source >= 3) | 409 | if (source < 0 || source >= 3) |
389 | return -EINVAL; | 410 | return -EINVAL; |
390 | 411 | ||
391 | ret = pdata->set_timer_src(timer->pdev, source); | 412 | /* |
413 | * FIXME: Used for OMAP1 devices only because they do not currently | ||
414 | * use the clock framework to set the parent clock. To be removed | ||
415 | * once OMAP1 migrated to using clock framework for dmtimers | ||
416 | */ | ||
417 | if (pdata->set_timer_src) | ||
418 | return pdata->set_timer_src(timer->pdev, source); | ||
419 | |||
420 | fclk = clk_get(&timer->pdev->dev, "fck"); | ||
421 | if (IS_ERR_OR_NULL(fclk)) { | ||
422 | pr_err("%s: fck not found\n", __func__); | ||
423 | return -EINVAL; | ||
424 | } | ||
425 | |||
426 | switch (source) { | ||
427 | case OMAP_TIMER_SRC_SYS_CLK: | ||
428 | parent_name = "timer_sys_ck"; | ||
429 | break; | ||
430 | |||
431 | case OMAP_TIMER_SRC_32_KHZ: | ||
432 | parent_name = "timer_32k_ck"; | ||
433 | break; | ||
434 | |||
435 | case OMAP_TIMER_SRC_EXT_CLK: | ||
436 | parent_name = "timer_ext_ck"; | ||
437 | break; | ||
438 | } | ||
439 | |||
440 | parent = clk_get(&timer->pdev->dev, parent_name); | ||
441 | if (IS_ERR_OR_NULL(parent)) { | ||
442 | pr_err("%s: %s not found\n", __func__, parent_name); | ||
443 | ret = -EINVAL; | ||
444 | goto out; | ||
445 | } | ||
446 | |||
447 | ret = clk_set_parent(fclk, parent); | ||
448 | if (IS_ERR_VALUE(ret)) | ||
449 | pr_err("%s: failed to set %s as parent\n", __func__, | ||
450 | parent_name); | ||
451 | |||
452 | clk_put(parent); | ||
453 | out: | ||
454 | clk_put(fclk); | ||
392 | 455 | ||
393 | return ret; | 456 | return ret; |
394 | } | 457 | } |
@@ -431,10 +494,9 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, | |||
431 | 494 | ||
432 | omap_dm_timer_enable(timer); | 495 | omap_dm_timer_enable(timer); |
433 | 496 | ||
434 | if (timer->loses_context) { | 497 | if (!(timer->capability & OMAP_TIMER_ALWON)) { |
435 | u32 ctx_loss_cnt_after = | 498 | if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) != |
436 | timer->get_context_loss_count(&timer->pdev->dev); | 499 | timer->ctx_loss_count) |
437 | if (ctx_loss_cnt_after != timer->ctx_loss_count) | ||
438 | omap_timer_restore_context(timer); | 500 | omap_timer_restore_context(timer); |
439 | } | 501 | } |
440 | 502 | ||
@@ -674,13 +736,12 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) | |||
674 | 736 | ||
675 | timer->id = pdev->id; | 737 | timer->id = pdev->id; |
676 | timer->irq = irq->start; | 738 | timer->irq = irq->start; |
677 | timer->reserved = pdata->reserved; | 739 | timer->reserved = omap_dm_timer_reserved_systimer(timer->id); |
678 | timer->pdev = pdev; | 740 | timer->pdev = pdev; |
679 | timer->loses_context = pdata->loses_context; | 741 | timer->capability = pdata->timer_capability; |
680 | timer->get_context_loss_count = pdata->get_context_loss_count; | ||
681 | 742 | ||
682 | /* Skip pm_runtime_enable for OMAP1 */ | 743 | /* Skip pm_runtime_enable for OMAP1 */ |
683 | if (!pdata->needs_manual_reset) { | 744 | if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { |
684 | pm_runtime_enable(&pdev->dev); | 745 | pm_runtime_enable(&pdev->dev); |
685 | pm_runtime_irq_safe(&pdev->dev); | 746 | pm_runtime_irq_safe(&pdev->dev); |
686 | } | 747 | } |
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 5da73562e486..19e7fa577bd0 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | |||
@@ -55,23 +55,17 @@ | |||
55 | #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 | 55 | #define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 |
56 | #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 | 56 | #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 |
57 | 57 | ||
58 | /* | ||
59 | * IP revision identifier so that Highlander IP | ||
60 | * in OMAP4 can be distinguished. | ||
61 | */ | ||
62 | #define OMAP_TIMER_IP_VERSION_1 0x1 | ||
63 | |||
64 | /* timer capabilities used in hwmod database */ | 58 | /* timer capabilities used in hwmod database */ |
65 | #define OMAP_TIMER_SECURE 0x80000000 | 59 | #define OMAP_TIMER_SECURE 0x80000000 |
66 | #define OMAP_TIMER_ALWON 0x40000000 | 60 | #define OMAP_TIMER_ALWON 0x40000000 |
67 | #define OMAP_TIMER_HAS_PWM 0x20000000 | 61 | #define OMAP_TIMER_HAS_PWM 0x20000000 |
62 | #define OMAP_TIMER_NEEDS_RESET 0x10000000 | ||
68 | 63 | ||
69 | struct omap_timer_capability_dev_attr { | 64 | struct omap_timer_capability_dev_attr { |
70 | u32 timer_capability; | 65 | u32 timer_capability; |
71 | }; | 66 | }; |
72 | 67 | ||
73 | struct omap_dm_timer; | 68 | struct omap_dm_timer; |
74 | struct clk; | ||
75 | 69 | ||
76 | struct timer_regs { | 70 | struct timer_regs { |
77 | u32 tidr; | 71 | u32 tidr; |
@@ -96,16 +90,12 @@ struct timer_regs { | |||
96 | }; | 90 | }; |
97 | 91 | ||
98 | struct dmtimer_platform_data { | 92 | struct dmtimer_platform_data { |
93 | /* set_timer_src - Only used for OMAP1 devices */ | ||
99 | int (*set_timer_src)(struct platform_device *pdev, int source); | 94 | int (*set_timer_src)(struct platform_device *pdev, int source); |
100 | int timer_ip_version; | 95 | u32 timer_capability; |
101 | u32 needs_manual_reset:1; | ||
102 | bool reserved; | ||
103 | |||
104 | bool loses_context; | ||
105 | |||
106 | int (*get_context_loss_count)(struct device *dev); | ||
107 | }; | 96 | }; |
108 | 97 | ||
98 | int omap_dm_timer_reserve_systimer(int id); | ||
109 | struct omap_dm_timer *omap_dm_timer_request(void); | 99 | struct omap_dm_timer *omap_dm_timer_request(void); |
110 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); | 100 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); |
111 | int omap_dm_timer_free(struct omap_dm_timer *timer); | 101 | int omap_dm_timer_free(struct omap_dm_timer *timer); |
@@ -272,13 +262,11 @@ struct omap_dm_timer { | |||
272 | unsigned reserved:1; | 262 | unsigned reserved:1; |
273 | unsigned posted:1; | 263 | unsigned posted:1; |
274 | struct timer_regs context; | 264 | struct timer_regs context; |
275 | bool loses_context; | ||
276 | int ctx_loss_count; | 265 | int ctx_loss_count; |
277 | int revision; | 266 | int revision; |
267 | u32 capability; | ||
278 | struct platform_device *pdev; | 268 | struct platform_device *pdev; |
279 | struct list_head node; | 269 | struct list_head node; |
280 | |||
281 | int (*get_context_loss_count)(struct device *dev); | ||
282 | }; | 270 | }; |
283 | 271 | ||
284 | int omap_dm_timer_prepare(struct omap_dm_timer *timer); | 272 | int omap_dm_timer_prepare(struct omap_dm_timer *timer); |