diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-23 06:41:32 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 07:24:47 -0500 |
commit | 10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch) | |
tree | d2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/plat-omap | |
parent | 127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff) |
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 8162eed8b500..4f2fd5591337 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -410,7 +410,7 @@ static inline void set_24xx_gpio_triggering(void __iomem *base, int gpio, int tr | |||
410 | trigger & __IRQT_RISEDGE); | 410 | trigger & __IRQT_RISEDGE); |
411 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, | 411 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, |
412 | trigger & __IRQT_FALEDGE); | 412 | trigger & __IRQT_FALEDGE); |
413 | /* FIXME: Possibly do 'set_irq_handler(j, do_level_IRQ)' if only level | 413 | /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level |
414 | * triggering requested. */ | 414 | * triggering requested. */ |
415 | } | 415 | } |
416 | 416 | ||
@@ -783,7 +783,7 @@ void omap_free_gpio(int gpio) | |||
783 | * line's interrupt handler has been run, we may miss some nested | 783 | * line's interrupt handler has been run, we may miss some nested |
784 | * interrupts. | 784 | * interrupts. |
785 | */ | 785 | */ |
786 | static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc) | 786 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
787 | { | 787 | { |
788 | void __iomem *isr_reg = NULL; | 788 | void __iomem *isr_reg = NULL; |
789 | u32 isr; | 789 | u32 isr; |
@@ -853,7 +853,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc) | |||
853 | 853 | ||
854 | gpio_irq = bank->virtual_irq_start; | 854 | gpio_irq = bank->virtual_irq_start; |
855 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 855 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
856 | struct irqdesc *d; | 856 | struct irq_desc *d; |
857 | int irq_mask; | 857 | int irq_mask; |
858 | if (!(isr & 1)) | 858 | if (!(isr & 1)) |
859 | continue; | 859 | continue; |
@@ -1092,7 +1092,7 @@ static int __init _omap_gpio_init(void) | |||
1092 | set_irq_chip(j, &mpuio_irq_chip); | 1092 | set_irq_chip(j, &mpuio_irq_chip); |
1093 | else | 1093 | else |
1094 | set_irq_chip(j, &gpio_irq_chip); | 1094 | set_irq_chip(j, &gpio_irq_chip); |
1095 | set_irq_handler(j, do_simple_IRQ); | 1095 | set_irq_handler(j, handle_simple_irq); |
1096 | set_irq_flags(j, IRQF_VALID); | 1096 | set_irq_flags(j, IRQF_VALID); |
1097 | } | 1097 | } |
1098 | set_irq_chained_handler(bank->irq, gpio_irq_handler); | 1098 | set_irq_chained_handler(bank->irq, gpio_irq_handler); |