[ARM] 3142/1: OMAP 2/5: Update files common to omap1 and omap2

Patch from Tony Lindgren

This patch syncs the mainline kernel with linux-omap tree.
The highlights of the patch are:

- Serial port and framebuffer init improvments by Imre Deak

- Common omap pin mux framework by Tony Lindgren

- Common omap clock framework by Tony Lindren

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 116 insertions, 27 deletions

diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 7ad69f14a3e7..792f66375830 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,10 +20,13 @@
 #include <asm/io.h>
 #include <asm/cacheflush.h>
 
-#include "sram.h"
+#include <asm/arch/sram.h>
+
+#define OMAP1_SRAM_PA           0x20000000
+#define OMAP1_SRAM_VA           0xd0000000
+#define OMAP2_SRAM_PA           0x40200000
+#define OMAP2_SRAM_VA           0xd0000000
 
-#define OMAP1_SRAM_BASE         0xd0000000
-#define OMAP1_SRAM_START        0x20000000
 #define SRAM_BOOTLOADER_SZ      0x80
 
 static unsigned long omap_sram_base;
@@ -31,37 +34,40 @@ static unsigned long omap_sram_size;
 static unsigned long omap_sram_ceil;
 
 /*
- * The amount of SRAM depends on the core type:
- * 730 = 200K, 1510 = 512K, 5912 = 256K, 1610 = 16K, 1710 = 16K
+ * The amount of SRAM depends on the core type.
  * Note that we cannot try to test for SRAM here because writes
  * to secure SRAM will hang the system. Also the SRAM is not
  * yet mapped at this point.
  */
 void __init omap_detect_sram(void)
 {
-        omap_sram_base = OMAP1_SRAM_BASE;
+        if (!cpu_is_omap24xx())
+                omap_sram_base = OMAP1_SRAM_VA;
+        else
+                omap_sram_base = OMAP2_SRAM_VA;
 
         if (cpu_is_omap730())
-                omap_sram_size = 0x32000;
-        else if (cpu_is_omap1510())
-                omap_sram_size = 0x80000;
+                omap_sram_size = 0x32000;       /* 200K */
+        else if (cpu_is_omap15xx())
+                omap_sram_size = 0x30000;       /* 192K */
         else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710())
-                omap_sram_size = 0x4000;
+                omap_sram_size = 0x4000;        /* 16K */
         else if (cpu_is_omap1611())
-                omap_sram_size = 0x3e800;
+                omap_sram_size = 0x3e800;       /* 250K */
+        else if (cpu_is_omap2420())
+                omap_sram_size = 0xa0014;       /* 640K */
         else {
                 printk(KERN_ERR "Could not detect SRAM size\n");
                 omap_sram_size = 0x4000;
         }
 
-        printk(KERN_INFO "SRAM size: 0x%lx\n", omap_sram_size);
         omap_sram_ceil = omap_sram_base + omap_sram_size;
 }
 
 static struct map_desc omap_sram_io_desc[] __initdata = {
         {       /* .length gets filled in at runtime */
-                .virtual        = OMAP1_SRAM_BASE,
-                .pfn            = __phys_to_pfn(OMAP1_SRAM_START),
+                .virtual        = OMAP1_SRAM_VA,
+                .pfn            = __phys_to_pfn(OMAP1_SRAM_PA),
                 .type           = MT_DEVICE
         }
 };
@@ -76,10 +82,19 @@ void __init omap_map_sram(void)
         if (omap_sram_size == 0)
                 return;
 
+        if (cpu_is_omap24xx()) {
+                omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
+                omap_sram_io_desc[0].pfn = __phys_to_pfn(OMAP2_SRAM_PA);
+        }
+
         omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
         omap_sram_io_desc[0].length *= PAGE_SIZE;
         iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
 
+        printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
+               omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
+               omap_sram_io_desc[0].length);
+
         /*
          * Looks like we need to preserve some bootloader code at the
          * beginning of SRAM for jumping to flash for reboot to work...
@@ -88,16 +103,6 @@ void __init omap_map_sram(void)
                omap_sram_size - SRAM_BOOTLOADER_SZ);
 }
 
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl) = NULL;
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
-        if (_omap_sram_reprogram_clock == NULL)
-                panic("Cannot use SRAM");
-
-        return _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
 void * omap_sram_push(void * start, unsigned long size)
 {
         if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
@@ -111,10 +116,94 @@ void * omap_sram_push(void * start, unsigned long size)
         return (void *)omap_sram_ceil;
 }
 
-void __init omap_sram_init(void)
+static void omap_sram_error(void)
+{
+        panic("Uninitialized SRAM function\n");
+}
+
+#ifdef CONFIG_ARCH_OMAP1
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+        if (!_omap_sram_reprogram_clock)
+                omap_sram_error();
+
+        return _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap1_sram_init(void)
 {
-        omap_detect_sram();
-        omap_map_sram();
         _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
                                                     sram_reprogram_clock_sz);
+
+        return 0;
+}
+
+#else
+#define omap1_sram_init()       do {} while (0)
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                              u32 base_cs, u32 force_unlock);
+
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                   u32 base_cs, u32 force_unlock)
+{
+        if (!_omap2_sram_ddr_init)
+                omap_sram_error();
+
+        return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+                                    base_cs, force_unlock);
+}
+
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+                                          u32 mem_type);
+
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+        if (!_omap2_sram_reprogram_sdrc)
+                omap_sram_error();
+
+        return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+        if (!_omap2_set_prcm)
+                omap_sram_error();
+
+        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+
+int __init omap2_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
+                                                    sram_reprogram_sdrc_sz);
+        _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+#define omap2_sram_init()       do {} while (0)
+#endif
+
+int __init omap_sram_init(void)
+{
+        omap_detect_sram();
+        omap_map_sram();
+
+        if (!cpu_is_omap24xx())
+                omap1_sram_init();
+        else
+                omap2_sram_init();
+
+        return 0;
 }