diff options
author | Tony Lindgren <tony@atomide.com> | 2012-08-31 19:08:07 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-09-12 21:06:31 -0400 |
commit | c49f34bc25900c3c6638fed0987c9abea3c212ea (patch) | |
tree | e1686e3c2cf56aee878fe3a725d4f7651464ec91 /arch/arm/plat-omap/include | |
parent | dbc04161048dd5e5c3c58546688a0cc0854051e9 (diff) |
ARM: OMAP2+ Move SoC specific headers to be local to mach-omap2
These can now be moved to be local headers in mach-omap2.
Note that this patch removes arch/arm/plat-omap/devices.c as it
will get removed anyways with Paul Walmsley's patch
"ARM: OMAP: split OMAP1, OMAP2+ RNG device registration".
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/am33xx.h | 25 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap24xx.h | 89 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap34xx.h | 101 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap44xx.h | 62 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap54xx.h | 32 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/ti81xx.h | 27 |
6 files changed, 0 insertions, 336 deletions
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h deleted file mode 100644 index 06c19bb7bca6..000000000000 --- a/arch/arm/plat-omap/include/plat/am33xx.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the address info for various AM33XX modules. | ||
3 | * | ||
4 | * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License as | ||
8 | * published by the Free Software Foundation version 2. | ||
9 | * | ||
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
11 | * kind, whether express or implied; without even the implied warranty | ||
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_AM33XX_H | ||
17 | #define __ASM_ARCH_AM33XX_H | ||
18 | |||
19 | #define L4_SLOW_AM33XX_BASE 0x48000000 | ||
20 | |||
21 | #define AM33XX_SCM_BASE 0x44E10000 | ||
22 | #define AM33XX_CTRL_BASE AM33XX_SCM_BASE | ||
23 | #define AM33XX_PRCM_BASE 0x44E00000 | ||
24 | |||
25 | #endif /* __ASM_ARCH_AM33XX_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/omap24xx.h b/arch/arm/plat-omap/include/plat/omap24xx.h deleted file mode 100644 index 92df9e27cc5c..000000000000 --- a/arch/arm/plat-omap/include/plat/omap24xx.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/omap24xx.h | ||
3 | * | ||
4 | * This file contains the processor specific definitions | ||
5 | * of the TI OMAP24XX. | ||
6 | * | ||
7 | * Copyright (C) 2007 Texas Instruments. | ||
8 | * Copyright (C) 2007 Nokia Corporation. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | * | ||
24 | */ | ||
25 | |||
26 | #ifndef __ASM_ARCH_OMAP2_H | ||
27 | #define __ASM_ARCH_OMAP2_H | ||
28 | |||
29 | /* | ||
30 | * Please place only base defines here and put the rest in device | ||
31 | * specific headers. Note also that some of these defines are needed | ||
32 | * for omap1 to compile without adding ifdefs. | ||
33 | */ | ||
34 | |||
35 | #define L4_24XX_BASE 0x48000000 | ||
36 | #define L4_WK_243X_BASE 0x49000000 | ||
37 | #define L3_24XX_BASE 0x68000000 | ||
38 | |||
39 | /* interrupt controller */ | ||
40 | #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) | ||
41 | #define OMAP24XX_IVA_INTC_BASE 0x40000000 | ||
42 | |||
43 | #define OMAP242X_CTRL_BASE L4_24XX_BASE | ||
44 | #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) | ||
45 | #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) | ||
46 | #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) | ||
47 | #define OMAP2420_PRM_BASE OMAP2420_CM_BASE | ||
48 | #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) | ||
49 | #define OMAP2420_SMS_BASE 0x68008000 | ||
50 | #define OMAP2420_GPMC_BASE 0x6800a000 | ||
51 | |||
52 | #define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) | ||
53 | #define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) | ||
54 | #define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000) | ||
55 | #define OMAP2430_PRM_BASE OMAP2430_CM_BASE | ||
56 | |||
57 | #define OMAP243X_SMS_BASE 0x6C000000 | ||
58 | #define OMAP243X_SDRC_BASE 0x6D000000 | ||
59 | #define OMAP243X_GPMC_BASE 0x6E000000 | ||
60 | #define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000) | ||
61 | #define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE | ||
62 | #define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000) | ||
63 | |||
64 | /* DSP SS */ | ||
65 | #define OMAP2420_DSP_BASE 0x58000000 | ||
66 | #define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0) | ||
67 | #define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000) | ||
68 | #define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000) | ||
69 | |||
70 | #define OMAP243X_DSP_BASE 0x5C000000 | ||
71 | #define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0) | ||
72 | #define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000) | ||
73 | |||
74 | /* Mailbox */ | ||
75 | #define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000) | ||
76 | |||
77 | /* Camera */ | ||
78 | #define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000) | ||
79 | |||
80 | /* Security */ | ||
81 | #define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000) | ||
82 | #define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000) | ||
83 | #define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000) | ||
84 | #define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000) | ||
85 | #define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) | ||
86 | #define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) | ||
87 | |||
88 | #endif /* __ASM_ARCH_OMAP2_H */ | ||
89 | |||
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h deleted file mode 100644 index 0d818acf3917..000000000000 --- a/arch/arm/plat-omap/include/plat/omap34xx.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/omap34xx.h | ||
3 | * | ||
4 | * This file contains the processor specific definitions of the TI OMAP34XX. | ||
5 | * | ||
6 | * Copyright (C) 2007 Texas Instruments. | ||
7 | * Copyright (C) 2007 Nokia Corporation. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #ifndef __ASM_ARCH_OMAP3_H | ||
25 | #define __ASM_ARCH_OMAP3_H | ||
26 | |||
27 | /* | ||
28 | * Please place only base defines here and put the rest in device | ||
29 | * specific headers. | ||
30 | */ | ||
31 | |||
32 | #define L4_34XX_BASE 0x48000000 | ||
33 | #define L4_WK_34XX_BASE 0x48300000 | ||
34 | #define L4_PER_34XX_BASE 0x49000000 | ||
35 | #define L4_EMU_34XX_BASE 0x54000000 | ||
36 | #define L3_34XX_BASE 0x68000000 | ||
37 | |||
38 | #define L4_WK_AM33XX_BASE 0x44C00000 | ||
39 | |||
40 | #define OMAP3430_32KSYNCT_BASE 0x48320000 | ||
41 | #define OMAP3430_CM_BASE 0x48004800 | ||
42 | #define OMAP3430_PRM_BASE 0x48306800 | ||
43 | #define OMAP343X_SMS_BASE 0x6C000000 | ||
44 | #define OMAP343X_SDRC_BASE 0x6D000000 | ||
45 | #define OMAP34XX_GPMC_BASE 0x6E000000 | ||
46 | #define OMAP343X_SCM_BASE 0x48002000 | ||
47 | #define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE | ||
48 | |||
49 | #define OMAP34XX_IC_BASE 0x48200000 | ||
50 | |||
51 | #define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000) | ||
52 | #define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100) | ||
53 | #define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400) | ||
54 | #define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600) | ||
55 | #define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00) | ||
56 | #define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00) | ||
57 | #define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00) | ||
58 | #define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) | ||
59 | #define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) | ||
60 | #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) | ||
61 | #define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800) | ||
62 | #define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970) | ||
63 | #define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0) | ||
64 | #define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00) | ||
65 | #define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70) | ||
66 | #define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0) | ||
67 | |||
68 | #define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) | ||
69 | #define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) | ||
70 | #define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF) | ||
71 | #define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7) | ||
72 | #define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047) | ||
73 | #define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F) | ||
74 | #define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F) | ||
75 | #define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) | ||
76 | #define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) | ||
77 | #define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) | ||
78 | #define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F) | ||
79 | #define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B) | ||
80 | #define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F) | ||
81 | #define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F) | ||
82 | #define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B) | ||
83 | #define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F) | ||
84 | |||
85 | #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) | ||
86 | #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) | ||
87 | #define OMAP34XX_UHH_CONFIG_BASE (L4_34XX_BASE + 0x64000) | ||
88 | #define OMAP34XX_OHCI_BASE (L4_34XX_BASE + 0x64400) | ||
89 | #define OMAP34XX_EHCI_BASE (L4_34XX_BASE + 0x64800) | ||
90 | #define OMAP34XX_SR1_BASE 0x480C9000 | ||
91 | #define OMAP34XX_SR2_BASE 0x480CB000 | ||
92 | |||
93 | #define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000) | ||
94 | |||
95 | /* Security */ | ||
96 | #define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000) | ||
97 | #define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000) | ||
98 | #define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000) | ||
99 | |||
100 | #endif /* __ASM_ARCH_OMAP3_H */ | ||
101 | |||
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h deleted file mode 100644 index 43b927b2e2e8..000000000000 --- a/arch/arm/plat-omap/include/plat/omap44xx.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /*: | ||
2 | * Address mappings and base address for OMAP4 interconnects | ||
3 | * and peripherals. | ||
4 | * | ||
5 | * Copyright (C) 2009 Texas Instruments | ||
6 | * | ||
7 | * Author: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | #ifndef __ASM_ARCH_OMAP44XX_H | ||
14 | #define __ASM_ARCH_OMAP44XX_H | ||
15 | |||
16 | /* | ||
17 | * Please place only base defines here and put the rest in device | ||
18 | * specific headers. | ||
19 | */ | ||
20 | #define L4_44XX_BASE 0x4a000000 | ||
21 | #define L4_WK_44XX_BASE 0x4a300000 | ||
22 | #define L4_PER_44XX_BASE 0x48000000 | ||
23 | #define L4_EMU_44XX_BASE 0x54000000 | ||
24 | #define L3_44XX_BASE 0x44000000 | ||
25 | #define OMAP44XX_EMIF1_BASE 0x4c000000 | ||
26 | #define OMAP44XX_EMIF2_BASE 0x4d000000 | ||
27 | #define OMAP44XX_DMM_BASE 0x4e000000 | ||
28 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 | ||
29 | #define OMAP4430_CM1_BASE 0x4a004000 | ||
30 | #define OMAP4430_CM_BASE OMAP4430_CM1_BASE | ||
31 | #define OMAP4430_CM2_BASE 0x4a008000 | ||
32 | #define OMAP4430_PRM_BASE 0x4a306000 | ||
33 | #define OMAP4430_PRCM_MPU_BASE 0x48243000 | ||
34 | #define OMAP44XX_GPMC_BASE 0x50000000 | ||
35 | #define OMAP443X_SCM_BASE 0x4a002000 | ||
36 | #define OMAP443X_CTRL_BASE 0x4a100000 | ||
37 | #define OMAP44XX_IC_BASE 0x48200000 | ||
38 | #define OMAP44XX_IVA_INTC_BASE 0x40000000 | ||
39 | #define IRQ_SIR_IRQ 0x0040 | ||
40 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 | ||
41 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 | ||
42 | #define OMAP44XX_IRQ_GIC_START 32 | ||
43 | #define OMAP44XX_SCU_BASE 0x48240000 | ||
44 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 | ||
45 | #define OMAP44XX_L2CACHE_BASE 0x48242000 | ||
46 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 | ||
47 | #define OMAP44XX_MCPDM_BASE 0x40132000 | ||
48 | #define OMAP44XX_SAR_RAM_BASE 0x4a326000 | ||
49 | |||
50 | #define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) | ||
51 | #define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) | ||
52 | |||
53 | #define OMAP4_MMU1_BASE 0x55082000 | ||
54 | #define OMAP4_MMU2_BASE 0x4A066000 | ||
55 | |||
56 | #define OMAP44XX_USBTLL_BASE (L4_44XX_BASE + 0x62000) | ||
57 | #define OMAP44XX_UHH_CONFIG_BASE (L4_44XX_BASE + 0x64000) | ||
58 | #define OMAP44XX_HSUSB_OHCI_BASE (L4_44XX_BASE + 0x64800) | ||
59 | #define OMAP44XX_HSUSB_EHCI_BASE (L4_44XX_BASE + 0x64C00) | ||
60 | |||
61 | #endif /* __ASM_ARCH_OMAP44XX_H */ | ||
62 | |||
diff --git a/arch/arm/plat-omap/include/plat/omap54xx.h b/arch/arm/plat-omap/include/plat/omap54xx.h deleted file mode 100644 index a2582bb3cab3..000000000000 --- a/arch/arm/plat-omap/include/plat/omap54xx.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /*: | ||
2 | * Address mappings and base address for OMAP5 interconnects | ||
3 | * and peripherals. | ||
4 | * | ||
5 | * Copyright (C) 2012 Texas Instruments | ||
6 | * Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
7 | * Sricharan <r.sricharan@ti.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | #ifndef __ASM_SOC_OMAP54XX_H | ||
14 | #define __ASM_SOC_OMAP54XX_H | ||
15 | |||
16 | /* | ||
17 | * Please place only base defines here and put the rest in device | ||
18 | * specific headers. | ||
19 | */ | ||
20 | #define L4_54XX_BASE 0x4a000000 | ||
21 | #define L4_WK_54XX_BASE 0x4ae00000 | ||
22 | #define L4_PER_54XX_BASE 0x48000000 | ||
23 | #define L3_54XX_BASE 0x44000000 | ||
24 | #define OMAP54XX_32KSYNCT_BASE 0x4ae04000 | ||
25 | #define OMAP54XX_CM_CORE_AON_BASE 0x4a004000 | ||
26 | #define OMAP54XX_CM_CORE_BASE 0x4a008000 | ||
27 | #define OMAP54XX_PRM_BASE 0x4ae06000 | ||
28 | #define OMAP54XX_PRCM_MPU_BASE 0x48243000 | ||
29 | #define OMAP54XX_SCM_BASE 0x4a002000 | ||
30 | #define OMAP54XX_CTRL_BASE 0x4a002800 | ||
31 | |||
32 | #endif /* __ASM_SOC_OMAP555554XX_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/ti81xx.h b/arch/arm/plat-omap/include/plat/ti81xx.h deleted file mode 100644 index 8f9843f78422..000000000000 --- a/arch/arm/plat-omap/include/plat/ti81xx.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the address data for various TI81XX modules. | ||
3 | * | ||
4 | * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License as | ||
8 | * published by the Free Software Foundation version 2. | ||
9 | * | ||
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
11 | * kind, whether express or implied; without even the implied warranty | ||
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_TI81XX_H | ||
17 | #define __ASM_ARCH_TI81XX_H | ||
18 | |||
19 | #define L4_SLOW_TI81XX_BASE 0x48000000 | ||
20 | |||
21 | #define TI81XX_SCM_BASE 0x48140000 | ||
22 | #define TI81XX_CTRL_BASE TI81XX_SCM_BASE | ||
23 | #define TI81XX_PRCM_BASE 0x48180000 | ||
24 | |||
25 | #define TI81XX_ARM_INTC_BASE 0x48200000 | ||
26 | |||
27 | #endif /* __ASM_ARCH_TI81XX_H */ | ||