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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:37:41 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:37:41 -0500 |
commit | 6d889d03ab1417645e76e129834f76204bae37c0 (patch) | |
tree | 577e37b5597b27f6de25bbbc634a0f17ccfb15f7 /arch/arm/plat-omap/include | |
parent | 7400c12eb069df781894a94dfa5c865f3fe3e2d4 (diff) | |
parent | 421b759b86eb8a914cbbd11f6d09a74f411762c6 (diff) |
Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Board-level changes
This adds and extends support for specific boards on a number of
ARM platforms: omap, imx, samsung, tegra, ...
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
Enable 32 bit flash support for iMX21ADS board
ARM: mx31pdk: Add MC13783 RTC support
iomux-mx25: configuration to support CSPI3 on CSI pins
MX1:apf9328: Add i2c support
mioa701: add newly available DoC G3 chip
arm/tegra: remove __initdata annotation from pinmux tables
arm/tegra: Use bus notifiers to trigger pinmux setup
arm/tegra: Refactor board-*-pinmux.c to share code
arm/tegra: Fix mistake in Trimslice's pinmux
arm/tegra: Rework Seaboard-vs-Ventana pinmux table
arm/tegra: Remove useless entries from ventana_pinmux[]
arm/tegra: PCIe: Remove include of mach/pinmux.h
arm/tegra: Harmony PCIe: Don't touch pinmux
arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio
arm/tegra: Split Seaboard GPIO table to allow for Ventana
ARM: imx6q: generate imx6q dtb files
arm/imx6q: Rename Sabreauto to Armadillo2
arm/imx6q-sabrelite: add enet phy ksz9021rn fixup
arm/imx6: add imx6q sabrelite board support
dts/imx: rename uart labels to consistent with hw spec
...
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/uncompress.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/usb.h | 32 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 7fbc361946b5..6ee90495ca4c 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h | |||
@@ -179,6 +179,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id) | |||
179 | /* TI8168 base boards using UART3 */ | 179 | /* TI8168 base boards using UART3 */ |
180 | DEBUG_LL_TI81XX(3, ti8168evm); | 180 | DEBUG_LL_TI81XX(3, ti8168evm); |
181 | 181 | ||
182 | /* TI8148 base boards using UART1 */ | ||
183 | DEBUG_LL_TI81XX(1, ti8148evm); | ||
184 | |||
182 | } while (0); | 185 | } while (0); |
183 | } | 186 | } |
184 | 187 | ||
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index 17d3c939775c..c616385f27bd 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
@@ -114,6 +114,7 @@ extern void am35x_musb_reset(void); | |||
114 | extern void am35x_musb_phy_power(u8 on); | 114 | extern void am35x_musb_phy_power(u8 on); |
115 | extern void am35x_musb_clear_irq(void); | 115 | extern void am35x_musb_clear_irq(void); |
116 | extern void am35x_set_mode(u8 musb_mode); | 116 | extern void am35x_set_mode(u8 musb_mode); |
117 | extern void ti81xx_musb_phy_power(u8 on); | ||
117 | 118 | ||
118 | /* | 119 | /* |
119 | * FIXME correct answer depends on hmc_mode, | 120 | * FIXME correct answer depends on hmc_mode, |
@@ -273,6 +274,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata) | |||
273 | #define CONF2_OTGPWRDN (1 << 2) | 274 | #define CONF2_OTGPWRDN (1 << 2) |
274 | #define CONF2_DATPOL (1 << 1) | 275 | #define CONF2_DATPOL (1 << 1) |
275 | 276 | ||
277 | /* TI81XX specific definitions */ | ||
278 | #define USBCTRL0 0x620 | ||
279 | #define USBSTAT0 0x624 | ||
280 | |||
281 | /* TI816X PHY controls bits */ | ||
282 | #define TI816X_USBPHY0_NORMAL_MODE (1 << 0) | ||
283 | #define TI816X_USBPHY_REFCLK_OSC (1 << 8) | ||
284 | |||
285 | /* TI814X PHY controls bits */ | ||
286 | #define USBPHY_CM_PWRDN (1 << 0) | ||
287 | #define USBPHY_OTG_PWRDN (1 << 1) | ||
288 | #define USBPHY_CHGDET_DIS (1 << 2) | ||
289 | #define USBPHY_CHGDET_RSTRT (1 << 3) | ||
290 | #define USBPHY_SRCONDM (1 << 4) | ||
291 | #define USBPHY_SINKONDP (1 << 5) | ||
292 | #define USBPHY_CHGISINK_EN (1 << 6) | ||
293 | #define USBPHY_CHGVSRC_EN (1 << 7) | ||
294 | #define USBPHY_DMPULLUP (1 << 8) | ||
295 | #define USBPHY_DPPULLUP (1 << 9) | ||
296 | #define USBPHY_CDET_EXTCTL (1 << 10) | ||
297 | #define USBPHY_GPIO_MODE (1 << 12) | ||
298 | #define USBPHY_DPOPBUFCTL (1 << 13) | ||
299 | #define USBPHY_DMOPBUFCTL (1 << 14) | ||
300 | #define USBPHY_DPINPUT (1 << 15) | ||
301 | #define USBPHY_DMINPUT (1 << 16) | ||
302 | #define USBPHY_DPGPIO_PD (1 << 17) | ||
303 | #define USBPHY_DMGPIO_PD (1 << 18) | ||
304 | #define USBPHY_OTGVDET_EN (1 << 19) | ||
305 | #define USBPHY_OTGSESSEND_EN (1 << 20) | ||
306 | #define USBPHY_DATA_POLARITY (1 << 23) | ||
307 | |||
276 | #if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) | 308 | #if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) |
277 | u32 omap1_usb0_init(unsigned nwires, unsigned is_device); | 309 | u32 omap1_usb0_init(unsigned nwires, unsigned is_device); |
278 | u32 omap1_usb1_init(unsigned nwires); | 310 | u32 omap1_usb1_init(unsigned nwires); |