aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-omap/include/plat/gpmc.h
diff options
context:
space:
mode:
authorIvan Djelic <ivan.djelic@parrot.com>2012-04-26 08:17:49 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-05-14 00:25:42 -0400
commit8d602cf50d3bba864bc1438f486b626df69c87b3 (patch)
tree18636ef99650881a6f0473780ab22fa4f58f4f1d /arch/arm/plat-omap/include/plat/gpmc.h
parent1951f2f710a621ae0bc4268617046a6c02c634d0 (diff)
ARM: OMAP3: gpmc: add BCH ecc api and modes
This patch adds a simple BCH ecc computation api, similar to the existing Hamming ecc api. It is intended to be used by the MTD layer. It implements the following features: - support 4-bit and 8-bit ecc computation - do not protect user bytes in spare area, only data area is protected - ecc for an erased NAND page (0xFFs) is also a sequence of 0xFFs This last feature is obtained by adding a constant polynomial to the hardware computed ecc. It allows to correct bitflips in blank pages and is extremely useful to support filesystems such as UBIFS, which expect erased pages to contain only 0xFFs. This api has been tested on an OMAP3630 board. Artem: The OMAP maintainer Tony Lindgren gave us his blessing for merging this patch via the MTD tree. Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/gpmc.h')
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 1527929b445a..f37764a36072 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -92,6 +92,8 @@ enum omap_ecc {
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ 92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93 /* 1-bit ecc: stored at beginning of spare area as romcode */ 93 /* 1-bit ecc: stored at beginning of spare area as romcode */
94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ 94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
95 OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
96 OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
95}; 97};
96 98
97/* 99/*
@@ -157,4 +159,13 @@ extern int gpmc_nand_write(int cs, int cmd, int wval);
157 159
158int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size); 160int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);
159int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code); 161int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);
162
163#ifdef CONFIG_ARCH_OMAP3
164int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors);
165int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
166 int nerrors);
167int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc);
168int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc);
169#endif /* CONFIG_ARCH_OMAP3 */
170
160#endif 171#endif