OMAP3: GPIO fixes for off-mode

Off mode is now using the omap2 retention fix code for scanning GPIOs
during off-mode transitions. All the *non_wakeup_gpios variables
are now used for off-mode transition tracking on OMAP3. This patch fixes
cases where GPIO state changes are missed during off-mode.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

1 files changed, 14 insertions, 5 deletions

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 45a225d09125..6216f4f09e82 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -731,7 +731,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
                                 __raw_writel(1 << gpio, bank->base
                                         + OMAP24XX_GPIO_CLEARWKUENA);
                 }
-        } else {
+        }
+        /* This part needs to be executed always for OMAP34xx */
+        if (cpu_is_omap34xx() || (bank->non_wakeup_gpios & gpio_bit)) {
                 if (trigger != 0)
                         bank->enabled_non_wakeup_gpios |= gpio_bit;
                 else
@@ -1845,7 +1847,8 @@ static int __init _omap_gpio_init(void)
                                 __raw_writel(0, bank->base +
                                                 OMAP24XX_GPIO_CTRL);
                         }
-                        if (i < ARRAY_SIZE(non_wakeup_gpios))
+                        if (cpu_is_omap24xx() &&
+                            i < ARRAY_SIZE(non_wakeup_gpios))
                                 bank->non_wakeup_gpios = non_wakeup_gpios[i];
                         gpio_count = 32;
                 }
@@ -2031,10 +2034,13 @@ static int workaround_enabled;
 void omap2_gpio_prepare_for_retention(void)
 {
         int i, c = 0;
+        int min = 0;
 
+        if (cpu_is_omap34xx())
+                min = 1;
         /* Remove triggering for all non-wakeup GPIOs.  Otherwise spurious
          * IRQs will be generated.  See OMAP2420 Errata item 1.101. */
-        for (i = 0; i < gpio_bank_count; i++) {
+        for (i = min; i < gpio_bank_count; i++) {
                 struct gpio_bank *bank = &gpio_bank[i];
                 u32 l1, l2;
 
@@ -2088,10 +2094,13 @@ void omap2_gpio_prepare_for_retention(void)
 void omap2_gpio_resume_after_retention(void)
 {
         int i;
+        int min = 0;
 
         if (!workaround_enabled)
                 return;
-        for (i = 0; i < gpio_bank_count; i++) {
+        if (cpu_is_omap34xx())
+                min = 1;
+        for (i = min; i < gpio_bank_count; i++) {
                 struct gpio_bank *bank = &gpio_bank[i];
                 u32 l, gen, gen0, gen1;
 
@@ -2119,7 +2128,7 @@ void omap2_gpio_resume_after_retention(void)
                  * horribly racy, but it's the best we can do to work around
                  * this silicon bug. */
                 l ^= bank->saved_datain;
-                l &= bank->non_wakeup_gpios;
+                l &= bank->enabled_non_wakeup_gpios;
 
                 /*
                  * No need to generate IRQs for the rising edge for gpio IRQs