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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-25 15:38:42 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-25 15:38:42 -0400
commitae4c42e4e4d76d003f8ca551fe1aef93ff9a4b21 (patch)
tree2bff2e4f4456077e7d7c589c8c28824f12dfa21c /arch/arm/plat-mxc
parentdd58ecba48edf14be1a5f70120fcd3002277a74a (diff)
parentab2a0e0d135490729e384c1826d118f92e88cae8 (diff)
Merge branch 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits) ARM: EXYNOS4: Change devname for FIMD clkdev ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210 ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100 ARM: S3C24XX: Use generic s3c_set_platdata for devices ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND ARM: SAMSUNG: Use generic s3c_set_platdata for NAND ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON ARM: SAMSUNG: Use generic s3c_set_platdata for FB ARM: SAMSUNG: Use generic s3c_set_platdata for TS ARM: S3C64XX: Add PWM backlight support on SMDK6410 ARM: S5P64X0: Add PWM backlight support on SMDK6450 ARM: S5P64X0: Add PWM backlight support on SMDK6440 ARM: S5PC100: Add PWM backlight support on SMDKC100 ARM: S5PV210: Add PWM backlight support on SMDKV210 ARM: EXYNOS4: Add PWM backlight support on SMDKC210 ARM: EXYNOS4: Add PWM backlight support on SMDKV310 ARM: SAMSUNG: Create a common infrastructure for PWM backlight support clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0 ... Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/avic.c12
-rw-r--r--arch/arm/plat-mxc/include/mach/debug-macro.S10
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h28
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v1.h3
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux.h26
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h8
-rw-r--r--arch/arm/plat-mxc/include/mach/timex.h13
-rw-r--r--arch/arm/plat-mxc/pwm.c8
-rw-r--r--arch/arm/plat-mxc/tzic.c4
9 files changed, 30 insertions, 82 deletions
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index 09e2bd0fcdca..55d2534ec727 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -46,6 +46,8 @@
46#define AVIC_FIPNDH 0x60 /* fast int pending high */ 46#define AVIC_FIPNDH 0x60 /* fast int pending high */
47#define AVIC_FIPNDL 0x64 /* fast int pending low */ 47#define AVIC_FIPNDL 0x64 /* fast int pending low */
48 48
49#define AVIC_NUM_IRQS 64
50
49void __iomem *avic_base; 51void __iomem *avic_base;
50 52
51#ifdef CONFIG_MXC_IRQ_PRIOR 53#ifdef CONFIG_MXC_IRQ_PRIOR
@@ -54,7 +56,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio)
54 unsigned int temp; 56 unsigned int temp;
55 unsigned int mask = 0x0F << irq % 8 * 4; 57 unsigned int mask = 0x0F << irq % 8 * 4;
56 58
57 if (irq >= MXC_INTERNAL_IRQS) 59 if (irq >= AVIC_NUM_IRQS)
58 return -EINVAL;; 60 return -EINVAL;;
59 61
60 temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); 62 temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8));
@@ -72,14 +74,14 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type)
72{ 74{
73 unsigned int irqt; 75 unsigned int irqt;
74 76
75 if (irq >= MXC_INTERNAL_IRQS) 77 if (irq >= AVIC_NUM_IRQS)
76 return -EINVAL; 78 return -EINVAL;
77 79
78 if (irq < MXC_INTERNAL_IRQS / 2) { 80 if (irq < AVIC_NUM_IRQS / 2) {
79 irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); 81 irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq);
80 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); 82 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL);
81 } else { 83 } else {
82 irq -= MXC_INTERNAL_IRQS / 2; 84 irq -= AVIC_NUM_IRQS / 2;
83 irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); 85 irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq);
84 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); 86 __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH);
85 } 87 }
@@ -138,7 +140,7 @@ void __init mxc_init_irq(void __iomem *irqbase)
138 /* all IRQ no FIQ */ 140 /* all IRQ no FIQ */
139 __raw_writel(0, avic_base + AVIC_INTTYPEH); 141 __raw_writel(0, avic_base + AVIC_INTTYPEH);
140 __raw_writel(0, avic_base + AVIC_INTTYPEL); 142 __raw_writel(0, avic_base + AVIC_INTTYPEL);
141 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 143 for (i = 0; i < AVIC_NUM_IRQS; i++) {
142 irq_set_chip_and_handler(i, &mxc_avic_chip.base, 144 irq_set_chip_and_handler(i, &mxc_avic_chip.base,
143 handle_level_irq); 145 handle_level_irq);
144 set_irq_flags(i, IRQF_VALID); 146 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 8e8d175e5077..91fc7cdb5dc9 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -12,32 +12,32 @@
12 */ 12 */
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14 14
15#ifdef CONFIG_ARCH_MX1 15#ifdef CONFIG_SOC_IMX1
16#define UART_PADDR MX1_UART1_BASE_ADDR 16#define UART_PADDR MX1_UART1_BASE_ADDR
17#endif 17#endif
18 18
19#ifdef CONFIG_ARCH_MX25 19#ifdef CONFIG_SOC_IMX25
20#ifdef UART_PADDR 20#ifdef UART_PADDR
21#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 21#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
22#endif 22#endif
23#define UART_PADDR MX25_UART1_BASE_ADDR 23#define UART_PADDR MX25_UART1_BASE_ADDR
24#endif 24#endif
25 25
26#ifdef CONFIG_ARCH_MX2 26#if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27)
27#ifdef UART_PADDR 27#ifdef UART_PADDR
28#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 28#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
29#endif 29#endif
30#define UART_PADDR MX2x_UART1_BASE_ADDR 30#define UART_PADDR MX2x_UART1_BASE_ADDR
31#endif 31#endif
32 32
33#ifdef CONFIG_ARCH_MX3 33#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35)
34#ifdef UART_PADDR 34#ifdef UART_PADDR
35#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 35#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
36#endif 36#endif
37#define UART_PADDR MX3x_UART1_BASE_ADDR 37#define UART_PADDR MX3x_UART1_BASE_ADDR
38#endif 38#endif
39 39
40#ifdef CONFIG_ARCH_MX5 40#ifdef CONFIG_SOC_IMX51
41#ifdef UART_PADDR 41#ifdef UART_PADDR
42#error "CONFIG_DEBUG_LL is incompatible with multiple archs" 42#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
43#endif 43#endif
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 67d3e2bed065..a8bfd565dcad 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -97,35 +97,17 @@
97 97
98#include <mach/mxc.h> 98#include <mach/mxc.h>
99 99
100#ifdef CONFIG_ARCH_MX5
101#include <mach/mx50.h> 100#include <mach/mx50.h>
102#include <mach/mx51.h> 101#include <mach/mx51.h>
103#include <mach/mx53.h> 102#include <mach/mx53.h>
104#endif
105
106#ifdef CONFIG_ARCH_MX3
107#include <mach/mx3x.h> 103#include <mach/mx3x.h>
108#include <mach/mx31.h> 104#include <mach/mx31.h>
109#include <mach/mx35.h> 105#include <mach/mx35.h>
110#endif 106#include <mach/mx2x.h>
111 107#include <mach/mx21.h>
112#ifdef CONFIG_ARCH_MX2 108#include <mach/mx27.h>
113# include <mach/mx2x.h> 109#include <mach/mx1.h>
114# ifdef CONFIG_MACH_MX21 110#include <mach/mx25.h>
115# include <mach/mx21.h>
116# endif
117# ifdef CONFIG_MACH_MX27
118# include <mach/mx27.h>
119# endif
120#endif
121
122#ifdef CONFIG_ARCH_MX1
123# include <mach/mx1.h>
124#endif
125
126#ifdef CONFIG_ARCH_MX25
127# include <mach/mx25.h>
128#endif
129 111
130#define imx_map_entry(soc, name, _type) { \ 112#define imx_map_entry(soc, name, _type) { \
131 .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ 113 .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h
index 253d64d686f8..6fa8a707b9a0 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h
@@ -85,9 +85,6 @@
85#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) 85#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT)
86#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) 86#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT)
87 87
88/* decode irq number to use with IMR(x), ISR(x) and friends */
89#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5)
90
91#define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) 88#define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x)
92#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) 89#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x)
93#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) 90#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x)
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h
deleted file mode 100644
index 3d226d7e7be2..000000000000
--- a/arch/arm/plat-mxc/include/mach/iomux.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 as published by
6 * the Free Software Foundation.
7 */
8#ifndef __MACH_IOMUX_H__
9#define __MACH_IOMUX_H__
10
11/* This file will go away, please include mach/iomux-mx... directly */
12
13#ifdef CONFIG_ARCH_MX1
14#include <mach/iomux-mx1.h>
15#endif
16#ifdef CONFIG_ARCH_MX2
17#include <mach/iomux-mx2x.h>
18#ifdef CONFIG_MACH_MX21
19#include <mach/iomux-mx21.h>
20#endif
21#ifdef CONFIG_MACH_MX27
22#include <mach/iomux-mx27.h>
23#endif
24#endif
25
26#endif /* __MACH_IOMUX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 4ac53ce97c24..09879235a9f5 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -68,7 +68,7 @@
68extern unsigned int __mxc_cpu_type; 68extern unsigned int __mxc_cpu_type;
69#endif 69#endif
70 70
71#ifdef CONFIG_ARCH_MX1 71#ifdef CONFIG_SOC_IMX1
72# ifdef mxc_cpu_type 72# ifdef mxc_cpu_type
73# undef mxc_cpu_type 73# undef mxc_cpu_type
74# define mxc_cpu_type __mxc_cpu_type 74# define mxc_cpu_type __mxc_cpu_type
@@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type;
80# define cpu_is_mx1() (0) 80# define cpu_is_mx1() (0)
81#endif 81#endif
82 82
83#ifdef CONFIG_MACH_MX21 83#ifdef CONFIG_SOC_IMX21
84# ifdef mxc_cpu_type 84# ifdef mxc_cpu_type
85# undef mxc_cpu_type 85# undef mxc_cpu_type
86# define mxc_cpu_type __mxc_cpu_type 86# define mxc_cpu_type __mxc_cpu_type
@@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type;
92# define cpu_is_mx21() (0) 92# define cpu_is_mx21() (0)
93#endif 93#endif
94 94
95#ifdef CONFIG_ARCH_MX25 95#ifdef CONFIG_SOC_IMX25
96# ifdef mxc_cpu_type 96# ifdef mxc_cpu_type
97# undef mxc_cpu_type 97# undef mxc_cpu_type
98# define mxc_cpu_type __mxc_cpu_type 98# define mxc_cpu_type __mxc_cpu_type
@@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type;
104# define cpu_is_mx25() (0) 104# define cpu_is_mx25() (0)
105#endif 105#endif
106 106
107#ifdef CONFIG_MACH_MX27 107#ifdef CONFIG_SOC_IMX27
108# ifdef mxc_cpu_type 108# ifdef mxc_cpu_type
109# undef mxc_cpu_type 109# undef mxc_cpu_type
110# define mxc_cpu_type __mxc_cpu_type 110# define mxc_cpu_type __mxc_cpu_type
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
index d61d5c74817c..10343d1f87e1 100644
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ b/arch/arm/plat-mxc/include/mach/timex.h
@@ -16,16 +16,7 @@
16#ifndef __ASM_ARCH_MXC_TIMEX_H__ 16#ifndef __ASM_ARCH_MXC_TIMEX_H__
17#define __ASM_ARCH_MXC_TIMEX_H__ 17#define __ASM_ARCH_MXC_TIMEX_H__
18 18
19#if defined CONFIG_ARCH_MX1 19/* Bogus value */
20#define CLOCK_TICK_RATE 16000000 20#define CLOCK_TICK_RATE 12345678
21#elif defined CONFIG_ARCH_MX2
22#define CLOCK_TICK_RATE 13300000
23#elif defined CONFIG_ARCH_MX3
24#define CLOCK_TICK_RATE 16625000
25#elif defined CONFIG_ARCH_MX25
26#define CLOCK_TICK_RATE 16000000
27#elif defined CONFIG_ARCH_MX5
28#define CLOCK_TICK_RATE 8000000
29#endif
30 21
31#endif /* __ASM_ARCH_MXC_TIMEX_H__ */ 22#endif /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 7a61ef8f471a..761c3c940a68 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev)
214 goto err_free_clk; 214 goto err_free_clk;
215 } 215 }
216 216
217 r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); 217 r = request_mem_region(r->start, resource_size(r), pdev->name);
218 if (r == NULL) { 218 if (r == NULL) {
219 dev_err(&pdev->dev, "failed to request memory resource\n"); 219 dev_err(&pdev->dev, "failed to request memory resource\n");
220 ret = -EBUSY; 220 ret = -EBUSY;
221 goto err_free_clk; 221 goto err_free_clk;
222 } 222 }
223 223
224 pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); 224 pwm->mmio_base = ioremap(r->start, resource_size(r));
225 if (pwm->mmio_base == NULL) { 225 if (pwm->mmio_base == NULL) {
226 dev_err(&pdev->dev, "failed to ioremap() registers\n"); 226 dev_err(&pdev->dev, "failed to ioremap() registers\n");
227 ret = -ENODEV; 227 ret = -ENODEV;
@@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev)
236 return 0; 236 return 0;
237 237
238err_free_mem: 238err_free_mem:
239 release_mem_region(r->start, r->end - r->start + 1); 239 release_mem_region(r->start, resource_size(r));
240err_free_clk: 240err_free_clk:
241 clk_put(pwm->clk); 241 clk_put(pwm->clk);
242err_free: 242err_free:
@@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev)
260 iounmap(pwm->mmio_base); 260 iounmap(pwm->mmio_base);
261 261
262 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 262 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
263 release_mem_region(r->start, r->end - r->start + 1); 263 release_mem_region(r->start, resource_size(r));
264 264
265 clk_put(pwm->clk); 265 clk_put(pwm->clk);
266 266
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index 57f9395f87ce..710f2e7da4ce 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -49,6 +49,8 @@
49 49
50void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ 50void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
51 51
52#define TZIC_NUM_IRQS 128
53
52#ifdef CONFIG_FIQ 54#ifdef CONFIG_FIQ
53static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) 55static int tzic_set_irq_fiq(unsigned int irq, unsigned int type)
54{ 56{
@@ -166,7 +168,7 @@ void __init tzic_init_irq(void __iomem *irqbase)
166 168
167 /* all IRQ no FIQ Warning :: No selection */ 169 /* all IRQ no FIQ Warning :: No selection */
168 170
169 for (i = 0; i < MXC_INTERNAL_IRQS; i++) { 171 for (i = 0; i < TZIC_NUM_IRQS; i++) {
170 irq_set_chip_and_handler(i, &mxc_tzic_chip.base, 172 irq_set_chip_and_handler(i, &mxc_tzic_chip.base,
171 handle_level_irq); 173 handle_level_irq);
172 set_irq_flags(i, IRQF_VALID); 174 set_irq_flags(i, IRQF_VALID);