diff options
author | Marc Zyngier <marc.zyngier@arm.com> | 2011-11-02 13:30:49 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2011-11-03 15:52:49 -0400 |
commit | a918feef334090692ea65e77a8b0cca5e682e666 (patch) | |
tree | 6db2e7cc24954d2e2fbc3abf9a066eeb6374f18c /arch/arm/plat-mxc | |
parent | 70c9f18ca8f3652c7dcf715e9f0d41c399fe130d (diff) |
ARM: mxc: fix local timer interrupt handling
As local timer interrupts are now handled as normal interrupts,
remove the special case in the GIC handler.
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Tested-and-Acked-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/gic.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c index b3b8eed263b8..12f8f8109010 100644 --- a/arch/arm/plat-mxc/gic.c +++ b/arch/arm/plat-mxc/gic.c | |||
@@ -28,21 +28,14 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) | |||
28 | if (irqnr == 1023) | 28 | if (irqnr == 1023) |
29 | break; | 29 | break; |
30 | 30 | ||
31 | if (irqnr > 29 && irqnr < 1021) | 31 | if (irqnr > 15 && irqnr < 1021) |
32 | handle_IRQ(irqnr, regs); | 32 | handle_IRQ(irqnr, regs); |
33 | #ifdef CONFIG_SMP | 33 | #ifdef CONFIG_SMP |
34 | else if (irqnr < 16) { | 34 | else { |
35 | writel_relaxed(irqstat, gic_cpu_base_addr + | 35 | writel_relaxed(irqstat, gic_cpu_base_addr + |
36 | GIC_CPU_EOI); | 36 | GIC_CPU_EOI); |
37 | handle_IPI(irqnr, regs); | 37 | handle_IPI(irqnr, regs); |
38 | } | 38 | } |
39 | #endif | 39 | #endif |
40 | #ifdef CONFIG_LOCAL_TIMERS | ||
41 | else if (irqnr == 29) { | ||
42 | writel_relaxed(irqstat, gic_cpu_base_addr + | ||
43 | GIC_CPU_EOI); | ||
44 | handle_local_timer(regs); | ||
45 | } | ||
46 | #endif | ||
47 | } while (1); | 40 | } while (1); |
48 | } | 41 | } |