diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 20:41:04 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 20:41:04 -0400 |
commit | 69f1d1a6acbaa7d83ef3f4ee26209c58cd000204 (patch) | |
tree | 12be981f8a123b8361edd64b84fd72f339a9655d /arch/arm/plat-mxc | |
parent | 2d86a3f04e345b03d5e429bfe14985ce26bff4dc (diff) | |
parent | 1e09939bad24df95ddeeeca4fbec64fa94b66def (diff) |
Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
ARM: S5P64X0: External Interrupt Support
ARM: EXYNOS4: Enable MFC on Samsung NURI
ARM: EXYNOS4: Enable MFC on universal_c210
ARM: S5PV210: Enable MFC on Goni
ARM: S5P: Add support for MFC device
ARM: EXYNOS4: Add support FIMD on SMDKC210
ARM: EXYNOS4: Add platform device and helper functions for FIMD
ARM: EXYNOS4: Add resource definition for FIMD
ARM: EXYNOS4: Change devname for FIMD clkdev
ARM: SAMSUNG: Add IRQ_I2S0 definition
ARM: SAMSUNG: Add platform device for idma
ARM: EXYNOS4: Add more registers to be saved and restored for PM
ARM: EXYNOS4: Add more register addresses of CMU
ARM: EXYNOS4: Add platform device for dwmci driver
ARM: EXYNOS4: configure rtc-s3c on NURI
ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
ARM: EXYNOS4: configure ADC on NURI
ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
...
Fix up tons of silly conflicts:
- arch/arm/mach-davinci/include/mach/psc.h
- arch/arm/mach-exynos4/Kconfig
- arch/arm/mach-exynos4/mach-smdkc210.c
- arch/arm/mach-exynos4/pm.c
- arch/arm/mach-imx/mm-imx1.c
- arch/arm/mach-imx/mm-imx21.c
- arch/arm/mach-imx/mm-imx25.c
- arch/arm/mach-imx/mm-imx27.c
- arch/arm/mach-imx/mm-imx31.c
- arch/arm/mach-imx/mm-imx35.c
- arch/arm/mach-mx5/mm.c
- arch/arm/mach-s5pv210/mach-goni.c
- arch/arm/mm/Kconfig
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r-- | arch/arm/plat-mxc/devices.c | 16 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-dma.c | 204 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-i2c.c | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-keypad.c | 5 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-ssi.c | 10 | ||||
-rw-r--r-- | arch/arm/plat-mxc/devices/platform-imx-uart.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/devices-common.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx53.h | 28 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/sdma.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/uncompress.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/irq-common.c | 13 | ||||
-rw-r--r-- | arch/arm/plat-mxc/tzic.c | 97 |
12 files changed, 101 insertions, 290 deletions
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index fb166b20f60f..0d6ed31bdbf2 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c | |||
@@ -95,8 +95,22 @@ struct device mxc_aips_bus = { | |||
95 | .parent = &platform_bus, | 95 | .parent = &platform_bus, |
96 | }; | 96 | }; |
97 | 97 | ||
98 | struct device mxc_ahb_bus = { | ||
99 | .init_name = "mxc_ahb", | ||
100 | .parent = &platform_bus, | ||
101 | }; | ||
102 | |||
98 | static int __init mxc_device_init(void) | 103 | static int __init mxc_device_init(void) |
99 | { | 104 | { |
100 | return device_register(&mxc_aips_bus); | 105 | int ret; |
106 | |||
107 | ret = device_register(&mxc_aips_bus); | ||
108 | if (IS_ERR_VALUE(ret)) | ||
109 | goto done; | ||
110 | |||
111 | ret = device_register(&mxc_ahb_bus); | ||
112 | |||
113 | done: | ||
114 | return ret; | ||
101 | } | 115 | } |
102 | core_initcall(mxc_device_init); | 116 | core_initcall(mxc_device_init); |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index c64f015e031b..2b0fdb23beb8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c | |||
@@ -6,207 +6,29 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/compiler.h> | ||
10 | #include <linux/err.h> | ||
11 | #include <linux/init.h> | ||
12 | |||
13 | #include <mach/hardware.h> | ||
14 | #include <mach/devices-common.h> | 9 | #include <mach/devices-common.h> |
15 | #include <mach/sdma.h> | ||
16 | |||
17 | struct imx_imx_sdma_data { | ||
18 | resource_size_t iobase; | ||
19 | resource_size_t irq; | ||
20 | struct sdma_platform_data pdata; | ||
21 | }; | ||
22 | |||
23 | #define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ | ||
24 | { \ | ||
25 | .iobase = soc ## _SDMA ## _BASE_ADDR, \ | ||
26 | .irq = soc ## _INT_SDMA, \ | ||
27 | .pdata = { \ | ||
28 | .sdma_version = _sdma_version, \ | ||
29 | .cpu_name = _cpu_name, \ | ||
30 | .to_version = _to_version, \ | ||
31 | }, \ | ||
32 | } | ||
33 | |||
34 | #ifdef CONFIG_SOC_IMX25 | ||
35 | struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = | ||
36 | imx_imx_sdma_data_entry_single(MX25, 2, "imx25", 1); | ||
37 | #endif /* ifdef CONFIG_SOC_IMX25 */ | ||
38 | 10 | ||
39 | #ifdef CONFIG_SOC_IMX31 | 11 | struct platform_device __init __maybe_unused *imx_add_imx_dma(void) |
40 | struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = | 12 | { |
41 | imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 1); | 13 | return platform_device_register_resndata(&mxc_ahb_bus, |
42 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 14 | "imx-dma", -1, NULL, 0, NULL, 0); |
43 | 15 | } | |
44 | #ifdef CONFIG_SOC_IMX35 | ||
45 | struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = | ||
46 | imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 1); | ||
47 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||
48 | |||
49 | #ifdef CONFIG_SOC_IMX51 | ||
50 | struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = | ||
51 | imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 1); | ||
52 | #endif /* ifdef CONFIG_SOC_IMX51 */ | ||
53 | 16 | ||
54 | static struct platform_device __init __maybe_unused *imx_add_imx_sdma( | 17 | struct platform_device __init __maybe_unused *imx_add_imx_sdma( |
55 | const struct imx_imx_sdma_data *data) | 18 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata) |
56 | { | 19 | { |
57 | struct resource res[] = { | 20 | struct resource res[] = { |
58 | { | 21 | { |
59 | .start = data->iobase, | 22 | .start = iobase, |
60 | .end = data->iobase + SZ_16K - 1, | 23 | .end = iobase + SZ_16K - 1, |
61 | .flags = IORESOURCE_MEM, | 24 | .flags = IORESOURCE_MEM, |
62 | }, { | 25 | }, { |
63 | .start = data->irq, | 26 | .start = irq, |
64 | .end = data->irq, | 27 | .end = irq, |
65 | .flags = IORESOURCE_IRQ, | 28 | .flags = IORESOURCE_IRQ, |
66 | }, | 29 | }, |
67 | }; | 30 | }; |
68 | 31 | ||
69 | return imx_add_platform_device("imx-sdma", -1, | 32 | return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma", |
70 | res, ARRAY_SIZE(res), | 33 | -1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); |
71 | &data->pdata, sizeof(data->pdata)); | ||
72 | } | ||
73 | |||
74 | static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) | ||
75 | { | ||
76 | return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); | ||
77 | } | ||
78 | |||
79 | #ifdef CONFIG_ARCH_MX25 | ||
80 | static struct sdma_script_start_addrs addr_imx25 = { | ||
81 | .ap_2_ap_addr = 729, | ||
82 | .uart_2_mcu_addr = 904, | ||
83 | .per_2_app_addr = 1255, | ||
84 | .mcu_2_app_addr = 834, | ||
85 | .uartsh_2_mcu_addr = 1120, | ||
86 | .per_2_shp_addr = 1329, | ||
87 | .mcu_2_shp_addr = 1048, | ||
88 | .ata_2_mcu_addr = 1560, | ||
89 | .mcu_2_ata_addr = 1479, | ||
90 | .app_2_per_addr = 1189, | ||
91 | .app_2_mcu_addr = 770, | ||
92 | .shp_2_per_addr = 1407, | ||
93 | .shp_2_mcu_addr = 979, | ||
94 | }; | ||
95 | #endif | ||
96 | |||
97 | #ifdef CONFIG_SOC_IMX31 | ||
98 | static struct sdma_script_start_addrs addr_imx31_to1 = { | ||
99 | .per_2_per_addr = 1677, | ||
100 | }; | ||
101 | |||
102 | static struct sdma_script_start_addrs addr_imx31_to2 = { | ||
103 | .ap_2_ap_addr = 423, | ||
104 | .ap_2_bp_addr = 829, | ||
105 | .bp_2_ap_addr = 1029, | ||
106 | }; | ||
107 | #endif | ||
108 | |||
109 | #ifdef CONFIG_SOC_IMX35 | ||
110 | static struct sdma_script_start_addrs addr_imx35_to1 = { | ||
111 | .ap_2_ap_addr = 642, | ||
112 | .uart_2_mcu_addr = 817, | ||
113 | .mcu_2_app_addr = 747, | ||
114 | .uartsh_2_mcu_addr = 1183, | ||
115 | .per_2_shp_addr = 1033, | ||
116 | .mcu_2_shp_addr = 961, | ||
117 | .ata_2_mcu_addr = 1333, | ||
118 | .mcu_2_ata_addr = 1252, | ||
119 | .app_2_mcu_addr = 683, | ||
120 | .shp_2_per_addr = 1111, | ||
121 | .shp_2_mcu_addr = 892, | ||
122 | }; | ||
123 | |||
124 | static struct sdma_script_start_addrs addr_imx35_to2 = { | ||
125 | .ap_2_ap_addr = 729, | ||
126 | .uart_2_mcu_addr = 904, | ||
127 | .per_2_app_addr = 1597, | ||
128 | .mcu_2_app_addr = 834, | ||
129 | .uartsh_2_mcu_addr = 1270, | ||
130 | .per_2_shp_addr = 1120, | ||
131 | .mcu_2_shp_addr = 1048, | ||
132 | .ata_2_mcu_addr = 1429, | ||
133 | .mcu_2_ata_addr = 1339, | ||
134 | .app_2_per_addr = 1531, | ||
135 | .app_2_mcu_addr = 770, | ||
136 | .shp_2_per_addr = 1198, | ||
137 | .shp_2_mcu_addr = 979, | ||
138 | }; | ||
139 | #endif | ||
140 | |||
141 | #ifdef CONFIG_SOC_IMX51 | ||
142 | static struct sdma_script_start_addrs addr_imx51 = { | ||
143 | .ap_2_ap_addr = 642, | ||
144 | .uart_2_mcu_addr = 817, | ||
145 | .mcu_2_app_addr = 747, | ||
146 | .mcu_2_shp_addr = 961, | ||
147 | .ata_2_mcu_addr = 1473, | ||
148 | .mcu_2_ata_addr = 1392, | ||
149 | .app_2_per_addr = 1033, | ||
150 | .app_2_mcu_addr = 683, | ||
151 | .shp_2_per_addr = 1251, | ||
152 | .shp_2_mcu_addr = 892, | ||
153 | }; | ||
154 | #endif | ||
155 | |||
156 | static int __init imxXX_add_imx_dma(void) | ||
157 | { | ||
158 | struct platform_device *ret; | ||
159 | |||
160 | #if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) | ||
161 | if (cpu_is_mx21() || cpu_is_mx27()) | ||
162 | ret = imx_add_imx_dma(); | ||
163 | else | ||
164 | #endif | ||
165 | |||
166 | #if defined(CONFIG_SOC_IMX25) | ||
167 | if (cpu_is_mx25()) { | ||
168 | imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25; | ||
169 | ret = imx_add_imx_sdma(&imx25_imx_sdma_data); | ||
170 | } else | ||
171 | #endif | ||
172 | |||
173 | #if defined(CONFIG_SOC_IMX31) | ||
174 | if (cpu_is_mx31()) { | ||
175 | int to_version = mx31_revision() >> 4; | ||
176 | imx31_imx_sdma_data.pdata.to_version = to_version; | ||
177 | if (to_version == 1) | ||
178 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to1; | ||
179 | else | ||
180 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to2; | ||
181 | ret = imx_add_imx_sdma(&imx31_imx_sdma_data); | ||
182 | } else | ||
183 | #endif | ||
184 | |||
185 | #if defined(CONFIG_SOC_IMX35) | ||
186 | if (cpu_is_mx35()) { | ||
187 | int to_version = mx35_revision() >> 4; | ||
188 | imx35_imx_sdma_data.pdata.to_version = to_version; | ||
189 | if (to_version == 1) | ||
190 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to1; | ||
191 | else | ||
192 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to2; | ||
193 | ret = imx_add_imx_sdma(&imx35_imx_sdma_data); | ||
194 | } else | ||
195 | #endif | ||
196 | |||
197 | #if defined(CONFIG_SOC_IMX51) | ||
198 | if (cpu_is_mx51()) { | ||
199 | int to_version = mx51_revision() >> 4; | ||
200 | imx51_imx_sdma_data.pdata.to_version = to_version; | ||
201 | imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51; | ||
202 | ret = imx_add_imx_sdma(&imx51_imx_sdma_data); | ||
203 | } else | ||
204 | #endif | ||
205 | ret = ERR_PTR(-ENODEV); | ||
206 | |||
207 | if (IS_ERR(ret)) | ||
208 | return PTR_ERR(ret); | ||
209 | |||
210 | return 0; | ||
211 | } | 34 | } |
212 | arch_initcall(imxXX_add_imx_dma); | ||
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index 2ab74f0da9a6..afe60f7244a8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c | |||
@@ -94,8 +94,9 @@ const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { | |||
94 | imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) | 94 | imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) |
95 | imx53_imx_i2c_data_entry(0, 1), | 95 | imx53_imx_i2c_data_entry(0, 1), |
96 | imx53_imx_i2c_data_entry(1, 2), | 96 | imx53_imx_i2c_data_entry(1, 2), |
97 | imx53_imx_i2c_data_entry(2, 3), | ||
97 | }; | 98 | }; |
98 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 99 | #endif /* ifdef CONFIG_SOC_IMX53 */ |
99 | 100 | ||
100 | struct platform_device *__init imx_add_imx_i2c( | 101 | struct platform_device *__init imx_add_imx_i2c( |
101 | const struct imx_imx_i2c_data *data, | 102 | const struct imx_imx_i2c_data *data, |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c index 26366114b021..479c3e9f771f 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c | |||
@@ -46,6 +46,11 @@ const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = | |||
46 | imx_imx_keypad_data_entry_single(MX51, SZ_16); | 46 | imx_imx_keypad_data_entry_single(MX51, SZ_16); |
47 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 47 | #endif /* ifdef CONFIG_SOC_IMX51 */ |
48 | 48 | ||
49 | #ifdef CONFIG_SOC_IMX53 | ||
50 | const struct imx_imx_keypad_data imx53_imx_keypad_data __initconst = | ||
51 | imx_imx_keypad_data_entry_single(MX53, SZ_16); | ||
52 | #endif /* ifdef CONFIG_SOC_IMX53 */ | ||
53 | |||
49 | struct platform_device *__init imx_add_imx_keypad( | 54 | struct platform_device *__init imx_add_imx_keypad( |
50 | const struct imx_imx_keypad_data *data, | 55 | const struct imx_imx_keypad_data *data, |
51 | const struct matrix_keymap_data *pdata) | 56 | const struct matrix_keymap_data *pdata) |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 66b8593e9b69..21c6f30e1017 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c | |||
@@ -76,6 +76,16 @@ const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { | |||
76 | }; | 76 | }; |
77 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 77 | #endif /* ifdef CONFIG_SOC_IMX51 */ |
78 | 78 | ||
79 | #ifdef CONFIG_SOC_IMX53 | ||
80 | const struct imx_imx_ssi_data imx53_imx_ssi_data[] __initconst = { | ||
81 | #define imx53_imx_ssi_data_entry(_id, _hwid) \ | ||
82 | imx_imx_ssi_data_entry(MX53, _id, _hwid, SZ_16K) | ||
83 | imx53_imx_ssi_data_entry(0, 1), | ||
84 | imx53_imx_ssi_data_entry(1, 2), | ||
85 | imx53_imx_ssi_data_entry(2, 3), | ||
86 | }; | ||
87 | #endif /* ifdef CONFIG_SOC_IMX53 */ | ||
88 | |||
79 | struct platform_device *__init imx_add_imx_ssi( | 89 | struct platform_device *__init imx_add_imx_ssi( |
80 | const struct imx_imx_ssi_data *data, | 90 | const struct imx_imx_ssi_data *data, |
81 | const struct imx_ssi_platform_data *pdata) | 91 | const struct imx_ssi_platform_data *pdata) |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index 3c854c2cc6dd..cfce8c918b73 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c | |||
@@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { | |||
123 | imx53_imx_uart_data_entry(0, 1), | 123 | imx53_imx_uart_data_entry(0, 1), |
124 | imx53_imx_uart_data_entry(1, 2), | 124 | imx53_imx_uart_data_entry(1, 2), |
125 | imx53_imx_uart_data_entry(2, 3), | 125 | imx53_imx_uart_data_entry(2, 3), |
126 | imx53_imx_uart_data_entry(3, 4), | ||
127 | imx53_imx_uart_data_entry(4, 5), | ||
126 | }; | 128 | }; |
127 | #endif /* ifdef CONFIG_SOC_IMX53 */ | 129 | #endif /* ifdef CONFIG_SOC_IMX53 */ |
128 | 130 | ||
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 03f626645374..bf93820ab61c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h | |||
@@ -9,8 +9,10 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <mach/sdma.h> | ||
12 | 13 | ||
13 | extern struct device mxc_aips_bus; | 14 | extern struct device mxc_aips_bus; |
15 | extern struct device mxc_ahb_bus; | ||
14 | 16 | ||
15 | struct platform_device *imx_add_platform_device_dmamask( | 17 | struct platform_device *imx_add_platform_device_dmamask( |
16 | const char *name, int id, | 18 | const char *name, int id, |
@@ -293,3 +295,7 @@ struct imx_spi_imx_data { | |||
293 | struct platform_device *__init imx_add_spi_imx( | 295 | struct platform_device *__init imx_add_spi_imx( |
294 | const struct imx_spi_imx_data *data, | 296 | const struct imx_spi_imx_data *data, |
295 | const struct spi_imx_master *pdata); | 297 | const struct spi_imx_master *pdata); |
298 | |||
299 | struct platform_device *imx_add_imx_dma(void); | ||
300 | struct platform_device *imx_add_imx_sdma( | ||
301 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 74cd093203e0..5e3c3236ebf3 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h | |||
@@ -176,10 +176,10 @@ | |||
176 | /* | 176 | /* |
177 | * DMA request assignments | 177 | * DMA request assignments |
178 | */ | 178 | */ |
179 | #define MX53_DMA_REQ_SSI3_TX1 47 | 179 | #define MX53_DMA_REQ_SSI3_TX0 47 |
180 | #define MX53_DMA_REQ_SSI3_RX1 46 | 180 | #define MX53_DMA_REQ_SSI3_RX0 46 |
181 | #define MX53_DMA_REQ_SSI3_TX2 45 | 181 | #define MX53_DMA_REQ_SSI3_TX1 45 |
182 | #define MX53_DMA_REQ_SSI3_RX2 44 | 182 | #define MX53_DMA_REQ_SSI3_RX1 44 |
183 | #define MX53_DMA_REQ_UART3_TX 43 | 183 | #define MX53_DMA_REQ_UART3_TX 43 |
184 | #define MX53_DMA_REQ_UART3_RX 42 | 184 | #define MX53_DMA_REQ_UART3_RX 42 |
185 | #define MX53_DMA_REQ_ESAI_TX 41 | 185 | #define MX53_DMA_REQ_ESAI_TX 41 |
@@ -194,14 +194,14 @@ | |||
194 | #define MX53_DMA_REQ_ASRC_DMA1 32 | 194 | #define MX53_DMA_REQ_ASRC_DMA1 32 |
195 | #define MX53_DMA_REQ_EMI_WR 31 | 195 | #define MX53_DMA_REQ_EMI_WR 31 |
196 | #define MX53_DMA_REQ_EMI_RD 30 | 196 | #define MX53_DMA_REQ_EMI_RD 30 |
197 | #define MX53_DMA_REQ_SSI1_TX1 29 | 197 | #define MX53_DMA_REQ_SSI1_TX0 29 |
198 | #define MX53_DMA_REQ_SSI1_RX1 28 | 198 | #define MX53_DMA_REQ_SSI1_RX0 28 |
199 | #define MX53_DMA_REQ_SSI1_TX2 27 | 199 | #define MX53_DMA_REQ_SSI1_TX1 27 |
200 | #define MX53_DMA_REQ_SSI1_RX2 26 | 200 | #define MX53_DMA_REQ_SSI1_RX1 26 |
201 | #define MX53_DMA_REQ_SSI2_TX1 25 | 201 | #define MX53_DMA_REQ_SSI2_TX0 25 |
202 | #define MX53_DMA_REQ_SSI2_RX1 24 | 202 | #define MX53_DMA_REQ_SSI2_RX0 24 |
203 | #define MX53_DMA_REQ_SSI2_TX2 23 | 203 | #define MX53_DMA_REQ_SSI2_TX1 23 |
204 | #define MX53_DMA_REQ_SSI2_RX2 22 | 204 | #define MX53_DMA_REQ_SSI2_RX1 22 |
205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 | 205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 |
206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 | 206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 |
207 | #define MX53_DMA_REQ_UART1_TX 19 | 207 | #define MX53_DMA_REQ_UART1_TX 19 |
@@ -241,7 +241,7 @@ | |||
241 | #define MX53_INT_IPU_ERR 10 | 241 | #define MX53_INT_IPU_ERR 10 |
242 | #define MX53_INT_IPU_SYN 11 | 242 | #define MX53_INT_IPU_SYN 11 |
243 | #define MX53_INT_GPU 12 | 243 | #define MX53_INT_GPU 12 |
244 | #define MX53_INT_RESV13 13 | 244 | #define MX53_INT_UART4 13 |
245 | #define MX53_INT_USB_H1 14 | 245 | #define MX53_INT_USB_H1 14 |
246 | #define MX53_INT_EMI 15 | 246 | #define MX53_INT_EMI 15 |
247 | #define MX53_INT_USB_H2 16 | 247 | #define MX53_INT_USB_H2 16 |
@@ -314,7 +314,7 @@ | |||
314 | #define MX53_INT_CAN2 83 | 314 | #define MX53_INT_CAN2 83 |
315 | #define MX53_INT_GPU2_IRQ 84 | 315 | #define MX53_INT_GPU2_IRQ 84 |
316 | #define MX53_INT_GPU2_BUSY 85 | 316 | #define MX53_INT_GPU2_BUSY 85 |
317 | #define MX53_INT_RESV86 86 | 317 | #define MX53_INT_UART5 86 |
318 | #define MX53_INT_FEC 87 | 318 | #define MX53_INT_FEC 87 |
319 | #define MX53_INT_OWIRE 88 | 319 | #define MX53_INT_OWIRE 88 |
320 | #define MX53_INT_CTI1_TG2 89 | 320 | #define MX53_INT_CTI1_TG2 89 |
diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h index 913e0432e40e..f495c87c113f 100644 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ b/arch/arm/plat-mxc/include/mach/sdma.h | |||
@@ -49,14 +49,12 @@ struct sdma_script_start_addrs { | |||
49 | * struct sdma_platform_data - platform specific data for SDMA engine | 49 | * struct sdma_platform_data - platform specific data for SDMA engine |
50 | * | 50 | * |
51 | * @sdma_version The version of this SDMA engine | 51 | * @sdma_version The version of this SDMA engine |
52 | * @cpu_name used to generate the firmware name | 52 | * @fw_name The firmware name |
53 | * @to_version CPU Tape out version | ||
54 | * @script_addrs SDMA scripts addresses in SDMA ROM | 53 | * @script_addrs SDMA scripts addresses in SDMA ROM |
55 | */ | 54 | */ |
56 | struct sdma_platform_data { | 55 | struct sdma_platform_data { |
57 | int sdma_version; | 56 | int sdma_version; |
58 | char *cpu_name; | 57 | char *fw_name; |
59 | int to_version; | ||
60 | struct sdma_script_start_addrs *script_addrs; | 58 | struct sdma_script_start_addrs *script_addrs; |
61 | }; | 59 | }; |
62 | 60 | ||
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index d85e2d1c0324..88fd40452567 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
@@ -117,6 +117,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
117 | case MACH_TYPE_MX53_EVK: | 117 | case MACH_TYPE_MX53_EVK: |
118 | case MACH_TYPE_MX53_LOCO: | 118 | case MACH_TYPE_MX53_LOCO: |
119 | case MACH_TYPE_MX53_SMD: | 119 | case MACH_TYPE_MX53_SMD: |
120 | case MACH_TYPE_MX53_ARD: | ||
120 | uart_base = MX53_UART1_BASE_ADDR; | 121 | uart_base = MX53_UART1_BASE_ADDR; |
121 | break; | 122 | break; |
122 | default: | 123 | default: |
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index e1c6eff7258a..96953e2e4f11 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c | |||
@@ -42,17 +42,16 @@ EXPORT_SYMBOL(imx_irq_set_priority); | |||
42 | 42 | ||
43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | 43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) |
44 | { | 44 | { |
45 | struct mxc_irq_chip *chip; | 45 | struct irq_chip_generic *gc; |
46 | struct irq_chip *base; | 46 | int (*set_irq_fiq)(unsigned int, unsigned int); |
47 | int ret; | 47 | int ret; |
48 | 48 | ||
49 | ret = -ENOSYS; | 49 | ret = -ENOSYS; |
50 | 50 | ||
51 | base = irq_get_chip(irq); | 51 | gc = irq_get_chip_data(irq); |
52 | if (base) { | 52 | if (gc && gc->private) { |
53 | chip = container_of(base, struct mxc_irq_chip, base); | 53 | set_irq_fiq = gc->private; |
54 | if (chip->set_irq_fiq) | 54 | ret = set_irq_fiq(irq, type); |
55 | ret = chip->set_irq_fiq(irq, type); | ||
56 | } | 55 | } |
57 | 56 | ||
58 | return ret; | 57 | return ret; |
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 710f2e7da4ce..f257fccdc394 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
@@ -68,78 +68,34 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
68 | 68 | ||
69 | return 0; | 69 | return 0; |
70 | } | 70 | } |
71 | #else | ||
72 | #define tzic_set_irq_fiq NULL | ||
71 | #endif | 73 | #endif |
72 | 74 | ||
73 | /** | 75 | static unsigned int *wakeup_intr[4]; |
74 | * tzic_mask_irq() - Disable interrupt source "d" in the TZIC | ||
75 | * | ||
76 | * @param d interrupt source | ||
77 | */ | ||
78 | static void tzic_mask_irq(struct irq_data *d) | ||
79 | { | ||
80 | int index, off; | ||
81 | |||
82 | index = d->irq >> 5; | ||
83 | off = d->irq & 0x1F; | ||
84 | __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index)); | ||
85 | } | ||
86 | |||
87 | /** | ||
88 | * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC | ||
89 | * | ||
90 | * @param d interrupt source | ||
91 | */ | ||
92 | static void tzic_unmask_irq(struct irq_data *d) | ||
93 | { | ||
94 | int index, off; | ||
95 | |||
96 | index = d->irq >> 5; | ||
97 | off = d->irq & 0x1F; | ||
98 | __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index)); | ||
99 | } | ||
100 | |||
101 | static unsigned int wakeup_intr[4]; | ||
102 | 76 | ||
103 | /** | 77 | static __init void tzic_init_gc(unsigned int irq_start) |
104 | * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source. | ||
105 | * | ||
106 | * @param d interrupt source | ||
107 | * @param enable enable as wake-up if equal to non-zero | ||
108 | * disble as wake-up if equal to zero | ||
109 | * | ||
110 | * @return This function returns 0 on success. | ||
111 | */ | ||
112 | static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable) | ||
113 | { | 78 | { |
114 | unsigned int index, off; | 79 | struct irq_chip_generic *gc; |
115 | 80 | struct irq_chip_type *ct; | |
116 | index = d->irq >> 5; | 81 | int idx = irq_start >> 5; |
117 | off = d->irq & 0x1F; | 82 | |
118 | 83 | gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, | |
119 | if (index > 3) | 84 | handle_level_irq); |
120 | return -EINVAL; | 85 | gc->private = tzic_set_irq_fiq; |
121 | 86 | gc->wake_enabled = IRQ_MSK(32); | |
122 | if (enable) | 87 | wakeup_intr[idx] = &gc->wake_active; |
123 | wakeup_intr[index] |= (1 << off); | 88 | |
124 | else | 89 | ct = gc->chip_types; |
125 | wakeup_intr[index] &= ~(1 << off); | 90 | ct->chip.irq_mask = irq_gc_mask_disable_reg; |
126 | 91 | ct->chip.irq_unmask = irq_gc_unmask_enable_reg; | |
127 | return 0; | 92 | ct->chip.irq_set_wake = irq_gc_set_wake; |
93 | ct->regs.disable = TZIC_ENCLEAR0(idx); | ||
94 | ct->regs.enable = TZIC_ENSET0(idx); | ||
95 | |||
96 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); | ||
128 | } | 97 | } |
129 | 98 | ||
130 | static struct mxc_irq_chip mxc_tzic_chip = { | ||
131 | .base = { | ||
132 | .name = "MXC_TZIC", | ||
133 | .irq_ack = tzic_mask_irq, | ||
134 | .irq_mask = tzic_mask_irq, | ||
135 | .irq_unmask = tzic_unmask_irq, | ||
136 | .irq_set_wake = tzic_set_wake_irq, | ||
137 | }, | ||
138 | #ifdef CONFIG_FIQ | ||
139 | .set_irq_fiq = tzic_set_irq_fiq, | ||
140 | #endif | ||
141 | }; | ||
142 | |||
143 | /* | 99 | /* |
144 | * This function initializes the TZIC hardware and disables all the | 100 | * This function initializes the TZIC hardware and disables all the |
145 | * interrupts. It registers the interrupt enable and disable functions | 101 | * interrupts. It registers the interrupt enable and disable functions |
@@ -168,11 +124,8 @@ void __init tzic_init_irq(void __iomem *irqbase) | |||
168 | 124 | ||
169 | /* all IRQ no FIQ Warning :: No selection */ | 125 | /* all IRQ no FIQ Warning :: No selection */ |
170 | 126 | ||
171 | for (i = 0; i < TZIC_NUM_IRQS; i++) { | 127 | for (i = 0; i < TZIC_NUM_IRQS; i += 32) |
172 | irq_set_chip_and_handler(i, &mxc_tzic_chip.base, | 128 | tzic_init_gc(i); |
173 | handle_level_irq); | ||
174 | set_irq_flags(i, IRQF_VALID); | ||
175 | } | ||
176 | 129 | ||
177 | #ifdef CONFIG_FIQ | 130 | #ifdef CONFIG_FIQ |
178 | /* Initialize FIQ */ | 131 | /* Initialize FIQ */ |
@@ -199,7 +152,7 @@ int tzic_enable_wake(int is_idle) | |||
199 | 152 | ||
200 | for (i = 0; i < 4; i++) { | 153 | for (i = 0; i < 4; i++) { |
201 | v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : | 154 | v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : |
202 | wakeup_intr[i]; | 155 | *wakeup_intr[i]; |
203 | __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); | 156 | __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); |
204 | } | 157 | } |
205 | 158 | ||