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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /arch/arm/plat-mxc/include/mach/uncompress.h
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/uncompress.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 082a3908256b..b6d3d0fddc48 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -1,8 +1,6 @@
1/* 1/*
2 * arch/arm/plat-mxc/include/mach/uncompress.h 2 * arch/arm/plat-mxc/include/mach/uncompress.h
3 * 3 *
4 *
5 *
6 * Copyright (C) 1999 ARM Limited 4 * Copyright (C) 1999 ARM Limited
7 * Copyright (C) Shane Nay (shane@minirl.com) 5 * Copyright (C) Shane Nay (shane@minirl.com)
8 * 6 *
@@ -25,7 +23,6 @@
25 23
26#define __MXC_BOOT_UNCOMPRESS 24#define __MXC_BOOT_UNCOMPRESS
27 25
28#include <mach/hardware.h>
29#include <asm/mach-types.h> 26#include <asm/mach-types.h>
30 27
31static unsigned long uart_base; 28static unsigned long uart_base;
@@ -60,13 +57,16 @@ static void putc(int ch)
60 UART(TXR) = ch; 57 UART(TXR) = ch;
61} 58}
62 59
63#define flush() do { } while (0) 60static inline void flush(void)
61{
62}
64 63
65#define MX1_UART1_BASE_ADDR 0x00206000 64#define MX1_UART1_BASE_ADDR 0x00206000
66#define MX25_UART1_BASE_ADDR 0x43f90000 65#define MX25_UART1_BASE_ADDR 0x43f90000
67#define MX2X_UART1_BASE_ADDR 0x1000a000 66#define MX2X_UART1_BASE_ADDR 0x1000a000
68#define MX3X_UART1_BASE_ADDR 0x43F90000 67#define MX3X_UART1_BASE_ADDR 0x43F90000
69#define MX3X_UART2_BASE_ADDR 0x43F94000 68#define MX3X_UART2_BASE_ADDR 0x43F94000
69#define MX51_UART1_BASE_ADDR 0x73fbc000
70 70
71static __inline__ void __arch_decomp_setup(unsigned long arch_id) 71static __inline__ void __arch_decomp_setup(unsigned long arch_id)
72{ 72{
@@ -83,6 +83,8 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
83 case MACH_TYPE_MX27ADS: 83 case MACH_TYPE_MX27ADS:
84 case MACH_TYPE_PCM038: 84 case MACH_TYPE_PCM038:
85 case MACH_TYPE_MX21ADS: 85 case MACH_TYPE_MX21ADS:
86 case MACH_TYPE_PCA100:
87 case MACH_TYPE_MXT_TD60:
86 uart_base = MX2X_UART1_BASE_ADDR; 88 uart_base = MX2X_UART1_BASE_ADDR;
87 break; 89 break;
88 case MACH_TYPE_MX31LITE: 90 case MACH_TYPE_MX31LITE:
@@ -94,11 +96,15 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
94 case MACH_TYPE_MX31ADS: 96 case MACH_TYPE_MX31ADS:
95 case MACH_TYPE_MX35_3DS: 97 case MACH_TYPE_MX35_3DS:
96 case MACH_TYPE_PCM043: 98 case MACH_TYPE_PCM043:
99 case MACH_TYPE_LILLY1131:
97 uart_base = MX3X_UART1_BASE_ADDR; 100 uart_base = MX3X_UART1_BASE_ADDR;
98 break; 101 break;
99 case MACH_TYPE_MAGX_ZN5: 102 case MACH_TYPE_MAGX_ZN5:
100 uart_base = MX3X_UART2_BASE_ADDR; 103 uart_base = MX3X_UART2_BASE_ADDR;
101 break; 104 break;
105 case MACH_TYPE_MX51_BABBAGE:
106 uart_base = MX51_UART1_BASE_ADDR;
107 break;
102 default: 108 default:
103 break; 109 break;
104 } 110 }