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authorDmitriy Taychenachev <dimichxp@gmail.com>2009-07-31 07:29:22 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-08-14 06:40:46 -0400
commitfd6ac7bb9d671d36fd7536c68fde977d197756ab (patch)
tree4c1993ee4079a55c6d621b46dba4826b92e3c028 /arch/arm/plat-mxc/include/mach/mxc.h
parent8e5be212cba6675dc363a224ce4a98bb07039b4b (diff)
MXC: add basic MXC91231 support
Signed-off-by: Dmitriy Taychenachev <dimichxp@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mxc.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 882b816729bd..51990536b845 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -30,6 +30,7 @@
30#define MXC_CPU_MX27 27 30#define MXC_CPU_MX27 27
31#define MXC_CPU_MX31 31 31#define MXC_CPU_MX31 31
32#define MXC_CPU_MX35 35 32#define MXC_CPU_MX35 35
33#define MXC_CPU_MXC91231 91231
33 34
34#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
35extern unsigned int __mxc_cpu_type; 36extern unsigned int __mxc_cpu_type;
@@ -107,13 +108,25 @@ extern unsigned int __mxc_cpu_type;
107# define cpu_is_mx35() (0) 108# define cpu_is_mx35() (0)
108#endif 109#endif
109 110
111#ifdef CONFIG_ARCH_MXC91231
112# ifdef mxc_cpu_type
113# undef mxc_cpu_type
114# define mxc_cpu_type __mxc_cpu_type
115# else
116# define mxc_cpu_type MXC_CPU_MXC91231
117# endif
118# define cpu_is_mxc91231() (mxc_cpu_type == MXC_CPU_MXC91231)
119#else
120# define cpu_is_mxc91231() (0)
121#endif
122
110#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) 123#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
111#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) 124#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10)
112#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) 125#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4)
113#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) 126#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8)
114#endif 127#endif
115 128
116#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) 129#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231())
117#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) 130#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27())
118 131
119#endif /* __ASM_ARCH_MXC_H__ */ 132#endif /* __ASM_ARCH_MXC_H__ */