diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2011-11-01 12:12:22 -0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-11-01 12:12:22 -0400 |
| commit | c72dbae971400e466ad9ff16c920cd6d9d8c55a1 (patch) | |
| tree | 7a0ebba8b14d889a8b42edfa1272be222b908a82 /arch/arm/plat-mxc/include/mach/mx35.h | |
| parent | 7e1efcf5d2039fb7a91e21df32f4175dbca4d61c (diff) | |
| parent | b4cbb8a4e602ea77b0525d06eff89c6a6070dab3 (diff) | |
Merge branch 'imx/devel' into next/dt
The board changes in the imx/devel branch conflict with other changes in
the device imx/dt branch.
Conflicts:
arch/arm/mach-mx5/board-mx53_loco.c
arch/arm/mach-mx5/board-mx53_smd.c
arch/arm/plat-mxc/include/mach/common.h
arch/arm/plat-mxc/include/mach/memory.h
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx35.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx35.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index d13dbfeef08a..80965a99aa55 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h | |||
| @@ -36,7 +36,7 @@ | |||
| 36 | #define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000) | 36 | #define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000) |
| 37 | #define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000) | 37 | #define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000) |
| 38 | #define MX35_SSI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x14000) | 38 | #define MX35_SSI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x14000) |
| 39 | #define MX35_ATA_DMA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000) | 39 | #define MX35_ATA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000) |
| 40 | #define MX35_MSHC1_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x24000) | 40 | #define MX35_MSHC1_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x24000) |
| 41 | #define MX35_FEC_BASE_ADDR 0x50038000 | 41 | #define MX35_FEC_BASE_ADDR 0x50038000 |
| 42 | #define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000) | 42 | #define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000) |