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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-10-30 07:35:11 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-30 07:35:11 -0400
commit67577927e8d7a1f4b09b4992df640eadc6aacb36 (patch)
tree2e9efe6b5745965faf0dcc084d4613d9356263f9 /arch/arm/plat-mxc/include/mach/mx25.h
parent6fe4c590313133ebd5dadb769031489ff178ece1 (diff)
parent51f00a471ce8f359627dd99aeac322947a0e491b (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Conflicts: drivers/mtd/mtd_blkdevs.c Merge Grant's device-tree bits so that we can apply the subsequent fixes. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx25.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 4a6f800990f8..cf46a45b0d4e 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -50,8 +50,11 @@
50#define MX25_SSI1_BASE_ADDR 0x50034000 50#define MX25_SSI1_BASE_ADDR 0x50034000
51#define MX25_NFC_BASE_ADDR 0xbb000000 51#define MX25_NFC_BASE_ADDR 0xbb000000
52#define MX25_DRYICE_BASE_ADDR 0x53ffc000 52#define MX25_DRYICE_BASE_ADDR 0x53ffc000
53#define MX25_ESDHC1_BASE_ADDR 0x53fb4000
54#define MX25_ESDHC2_BASE_ADDR 0x53fb8000
53#define MX25_LCDC_BASE_ADDR 0x53fbc000 55#define MX25_LCDC_BASE_ADDR 0x53fbc000
54#define MX25_KPP_BASE_ADDR 0x43fa8000 56#define MX25_KPP_BASE_ADDR 0x43fa8000
57#define MX25_SDMA_BASE_ADDR 0x53fd4000
55#define MX25_OTG_BASE_ADDR 0x53ff4000 58#define MX25_OTG_BASE_ADDR 0x53ff4000
56#define MX25_CSI_BASE_ADDR 0x53ff8000 59#define MX25_CSI_BASE_ADDR 0x53ff8000
57 60
@@ -59,6 +62,8 @@
59#define MX25_INT_I2C1 3 62#define MX25_INT_I2C1 3
60#define MX25_INT_I2C2 4 63#define MX25_INT_I2C2 4
61#define MX25_INT_UART4 5 64#define MX25_INT_UART4 5
65#define MX25_INT_ESDHC2 8
66#define MX25_INT_ESDHC1 9
62#define MX25_INT_I2C3 10 67#define MX25_INT_I2C3 10
63#define MX25_INT_SSI2 11 68#define MX25_INT_SSI2 11
64#define MX25_INT_SSI1 12 69#define MX25_INT_SSI1 12
@@ -69,7 +74,8 @@
69#define MX25_INT_KPP 24 74#define MX25_INT_KPP 24
70#define MX25_INT_DRYICE 25 75#define MX25_INT_DRYICE 25
71#define MX25_INT_UART2 32 76#define MX25_INT_UART2 32
72#define MX25_INT_NANDFC 33 77#define MX25_INT_NFC 33
78#define MX25_INT_SDMA 34
73#define MX25_INT_LCDC 39 79#define MX25_INT_LCDC 39
74#define MX25_INT_UART5 40 80#define MX25_INT_UART5 40
75#define MX25_INT_CAN1 43 81#define MX25_INT_CAN1 43
@@ -77,4 +83,13 @@
77#define MX25_INT_UART1 45 83#define MX25_INT_UART1 45
78#define MX25_INT_FEC 57 84#define MX25_INT_FEC 57
79 85
86#define MX25_DMA_REQ_SSI2_RX1 22
87#define MX25_DMA_REQ_SSI2_TX1 23
88#define MX25_DMA_REQ_SSI2_RX0 24
89#define MX25_DMA_REQ_SSI2_TX0 25
90#define MX25_DMA_REQ_SSI1_RX1 26
91#define MX25_DMA_REQ_SSI1_TX1 27
92#define MX25_DMA_REQ_SSI1_RX0 28
93#define MX25_DMA_REQ_SSI1_TX0 29
94
80#endif /* ifndef __MACH_MX25_H__ */ 95#endif /* ifndef __MACH_MX25_H__ */