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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-31 09:08:02 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-11-27 18:53:46 -0500
commitd73e60b7144a86baf0fdfcc9537a70bb4f72e11c (patch)
tree02155154caf6f1a5d6ce38f2a89ed67f875c7791 /arch/arm/mm
parent487ff32082a9bd7489d8185cf7d7a2fdf18a22fa (diff)
[ARM] copypage: convert assembly files to C
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/copypage-feroceon.S95
-rw-r--r--arch/arm/mm/copypage-feroceon.c100
-rw-r--r--arch/arm/mm/copypage-v3.S67
-rw-r--r--arch/arm/mm/copypage-v3.c69
-rw-r--r--arch/arm/mm/copypage-v4wb.S79
-rw-r--r--arch/arm/mm/copypage-v4wb.c83
-rw-r--r--arch/arm/mm/copypage-v4wt.S73
-rw-r--r--arch/arm/mm/copypage-v4wt.c77
-rw-r--r--arch/arm/mm/copypage-xsc3.S97
-rw-r--r--arch/arm/mm/copypage-xsc3.c102
10 files changed, 431 insertions, 411 deletions
diff --git a/arch/arm/mm/copypage-feroceon.S b/arch/arm/mm/copypage-feroceon.S
deleted file mode 100644
index 7eb0d320d240..000000000000
--- a/arch/arm/mm/copypage-feroceon.S
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-feroceon.S
3 *
4 * Copyright (C) 2008 Marvell Semiconductors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This handles copy_user_page and clear_user_page on Feroceon
11 * more optimally than the generic implementations.
12 */
13#include <linux/linkage.h>
14#include <linux/init.h>
15#include <asm/asm-offsets.h>
16
17 .text
18 .align 5
19
20ENTRY(feroceon_copy_user_page)
21 stmfd sp!, {r4-r9, lr}
22 mov ip, #PAGE_SZ
231: mov lr, r1
24 ldmia r1!, {r2 - r9}
25 pld [lr, #32]
26 pld [lr, #64]
27 pld [lr, #96]
28 pld [lr, #128]
29 pld [lr, #160]
30 pld [lr, #192]
31 pld [lr, #224]
32 stmia r0, {r2 - r9}
33 ldmia r1!, {r2 - r9}
34 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
35 add r0, r0, #32
36 stmia r0, {r2 - r9}
37 ldmia r1!, {r2 - r9}
38 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
39 add r0, r0, #32
40 stmia r0, {r2 - r9}
41 ldmia r1!, {r2 - r9}
42 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
43 add r0, r0, #32
44 stmia r0, {r2 - r9}
45 ldmia r1!, {r2 - r9}
46 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
47 add r0, r0, #32
48 stmia r0, {r2 - r9}
49 ldmia r1!, {r2 - r9}
50 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
51 add r0, r0, #32
52 stmia r0, {r2 - r9}
53 ldmia r1!, {r2 - r9}
54 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
55 add r0, r0, #32
56 stmia r0, {r2 - r9}
57 ldmia r1!, {r2 - r9}
58 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
59 add r0, r0, #32
60 stmia r0, {r2 - r9}
61 subs ip, ip, #(32 * 8)
62 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
63 add r0, r0, #32
64 bne 1b
65 mcr p15, 0, ip, c7, c10, 4 @ drain WB
66 ldmfd sp!, {r4-r9, pc}
67
68 .align 5
69
70ENTRY(feroceon_clear_user_page)
71 stmfd sp!, {r4-r7, lr}
72 mov r1, #PAGE_SZ/32
73 mov r2, #0
74 mov r3, #0
75 mov r4, #0
76 mov r5, #0
77 mov r6, #0
78 mov r7, #0
79 mov ip, #0
80 mov lr, #0
811: stmia r0, {r2-r7, ip, lr}
82 subs r1, r1, #1
83 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
84 add r0, r0, #32
85 bne 1b
86 mcr p15, 0, r1, c7, c10, 4 @ drain WB
87 ldmfd sp!, {r4-r7, pc}
88
89 __INITDATA
90
91 .type feroceon_user_fns, #object
92ENTRY(feroceon_user_fns)
93 .long feroceon_clear_user_page
94 .long feroceon_copy_user_page
95 .size feroceon_user_fns, . - feroceon_user_fns
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
new file mode 100644
index 000000000000..c8347670ab00
--- /dev/null
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -0,0 +1,100 @@
1/*
2 * linux/arch/arm/mm/copypage-feroceon.S
3 *
4 * Copyright (C) 2008 Marvell Semiconductors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This handles copy_user_page and clear_user_page on Feroceon
11 * more optimally than the generic implementations.
12 */
13#include <linux/init.h>
14
15#include <asm/page.h>
16
17void __attribute__((naked))
18feroceon_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
19{
20 asm("\
21 stmfd sp!, {r4-r9, lr} \n\
22 mov ip, %0 \n\
231: mov lr, r1 \n\
24 ldmia r1!, {r2 - r9} \n\
25 pld [lr, #32] \n\
26 pld [lr, #64] \n\
27 pld [lr, #96] \n\
28 pld [lr, #128] \n\
29 pld [lr, #160] \n\
30 pld [lr, #192] \n\
31 pld [lr, #224] \n\
32 stmia r0, {r2 - r9} \n\
33 ldmia r1!, {r2 - r9} \n\
34 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
35 add r0, r0, #32 \n\
36 stmia r0, {r2 - r9} \n\
37 ldmia r1!, {r2 - r9} \n\
38 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
39 add r0, r0, #32 \n\
40 stmia r0, {r2 - r9} \n\
41 ldmia r1!, {r2 - r9} \n\
42 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
43 add r0, r0, #32 \n\
44 stmia r0, {r2 - r9} \n\
45 ldmia r1!, {r2 - r9} \n\
46 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
47 add r0, r0, #32 \n\
48 stmia r0, {r2 - r9} \n\
49 ldmia r1!, {r2 - r9} \n\
50 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
51 add r0, r0, #32 \n\
52 stmia r0, {r2 - r9} \n\
53 ldmia r1!, {r2 - r9} \n\
54 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
55 add r0, r0, #32 \n\
56 stmia r0, {r2 - r9} \n\
57 ldmia r1!, {r2 - r9} \n\
58 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
59 add r0, r0, #32 \n\
60 stmia r0, {r2 - r9} \n\
61 subs ip, ip, #(32 * 8) \n\
62 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
63 add r0, r0, #32 \n\
64 bne 1b \n\
65 mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
66 ldmfd sp!, {r4-r9, pc}"
67 :
68 : "I" (PAGE_SIZE));
69}
70
71void __attribute__((naked))
72feroceon_clear_user_page(void *kaddr, unsigned long vaddr)
73{
74 asm("\
75 stmfd sp!, {r4-r7, lr} \n\
76 mov r1, %0 \n\
77 mov r2, #0 \n\
78 mov r3, #0 \n\
79 mov r4, #0 \n\
80 mov r5, #0 \n\
81 mov r6, #0 \n\
82 mov r7, #0 \n\
83 mov ip, #0 \n\
84 mov lr, #0 \n\
851: stmia r0, {r2-r7, ip, lr} \n\
86 subs r1, r1, #1 \n\
87 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
88 add r0, r0, #32 \n\
89 bne 1b \n\
90 mcr p15, 0, r1, c7, c10, 4 @ drain WB\n\
91 ldmfd sp!, {r4-r7, pc}"
92 :
93 : "I" (PAGE_SIZE / 32));
94}
95
96struct cpu_user_fns feroceon_user_fns __initdata = {
97 .cpu_clear_user_page = feroceon_clear_user_page,
98 .cpu_copy_user_page = feroceon_copy_user_page,
99};
100
diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S
deleted file mode 100644
index 2ee394b11bcb..000000000000
--- a/arch/arm/mm/copypage-v3.S
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/assembler.h>
15#include <asm/asm-offsets.h>
16
17 .text
18 .align 5
19/*
20 * ARMv3 optimised copy_user_page
21 *
22 * FIXME: do we need to handle cache stuff...
23 */
24ENTRY(v3_copy_user_page)
25 stmfd sp!, {r4, lr} @ 2
26 mov r2, #PAGE_SZ/64 @ 1
27 ldmia r1!, {r3, r4, ip, lr} @ 4+1
281: stmia r0!, {r3, r4, ip, lr} @ 4
29 ldmia r1!, {r3, r4, ip, lr} @ 4+1
30 stmia r0!, {r3, r4, ip, lr} @ 4
31 ldmia r1!, {r3, r4, ip, lr} @ 4+1
32 stmia r0!, {r3, r4, ip, lr} @ 4
33 ldmia r1!, {r3, r4, ip, lr} @ 4
34 subs r2, r2, #1 @ 1
35 stmia r0!, {r3, r4, ip, lr} @ 4
36 ldmneia r1!, {r3, r4, ip, lr} @ 4
37 bne 1b @ 1
38 ldmfd sp!, {r4, pc} @ 3
39
40 .align 5
41/*
42 * ARMv3 optimised clear_user_page
43 *
44 * FIXME: do we need to handle cache stuff...
45 */
46ENTRY(v3_clear_user_page)
47 str lr, [sp, #-4]!
48 mov r1, #PAGE_SZ/64 @ 1
49 mov r2, #0 @ 1
50 mov r3, #0 @ 1
51 mov ip, #0 @ 1
52 mov lr, #0 @ 1
531: stmia r0!, {r2, r3, ip, lr} @ 4
54 stmia r0!, {r2, r3, ip, lr} @ 4
55 stmia r0!, {r2, r3, ip, lr} @ 4
56 stmia r0!, {r2, r3, ip, lr} @ 4
57 subs r1, r1, #1 @ 1
58 bne 1b @ 1
59 ldr pc, [sp], #4
60
61 __INITDATA
62
63 .type v3_user_fns, #object
64ENTRY(v3_user_fns)
65 .long v3_clear_user_page
66 .long v3_copy_user_page
67 .size v3_user_fns, . - v3_user_fns
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
new file mode 100644
index 000000000000..184911089e6c
--- /dev/null
+++ b/arch/arm/mm/copypage-v3.c
@@ -0,0 +1,69 @@
1/*
2 * linux/arch/arm/mm/copypage-v3.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11
12#include <asm/page.h>
13
14/*
15 * ARMv3 optimised copy_user_page
16 *
17 * FIXME: do we need to handle cache stuff...
18 */
19void __attribute__((naked))
20v3_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
21{
22 asm("\n\
23 stmfd sp!, {r4, lr} @ 2\n\
24 mov r2, %2 @ 1\n\
25 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
261: stmia %1!, {r3, r4, ip, lr} @ 4\n\
27 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
28 stmia %1!, {r3, r4, ip, lr} @ 4\n\
29 ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
30 stmia %1!, {r3, r4, ip, lr} @ 4\n\
31 ldmia %0!, {r3, r4, ip, lr} @ 4\n\
32 subs r2, r2, #1 @ 1\n\
33 stmia %1!, {r3, r4, ip, lr} @ 4\n\
34 ldmneia %0!, {r3, r4, ip, lr} @ 4\n\
35 bne 1b @ 1\n\
36 ldmfd sp!, {r4, pc} @ 3"
37 :
38 : "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
39}
40
41/*
42 * ARMv3 optimised clear_user_page
43 *
44 * FIXME: do we need to handle cache stuff...
45 */
46void __attribute__((naked)) v3_clear_user_page(void *kaddr, unsigned long vaddr)
47{
48 asm("\n\
49 str lr, [sp, #-4]!\n\
50 mov r1, %1 @ 1\n\
51 mov r2, #0 @ 1\n\
52 mov r3, #0 @ 1\n\
53 mov ip, #0 @ 1\n\
54 mov lr, #0 @ 1\n\
551: stmia %0!, {r2, r3, ip, lr} @ 4\n\
56 stmia %0!, {r2, r3, ip, lr} @ 4\n\
57 stmia %0!, {r2, r3, ip, lr} @ 4\n\
58 stmia %0!, {r2, r3, ip, lr} @ 4\n\
59 subs r1, r1, #1 @ 1\n\
60 bne 1b @ 1\n\
61 ldr pc, [sp], #4"
62 :
63 : "r" (kaddr), "I" (PAGE_SIZE / 64));
64}
65
66struct cpu_user_fns v3_user_fns __initdata = {
67 .cpu_clear_user_page = v3_clear_user_page,
68 .cpu_copy_user_page = v3_copy_user_page,
69};
diff --git a/arch/arm/mm/copypage-v4wb.S b/arch/arm/mm/copypage-v4wb.S
deleted file mode 100644
index 83117354b1cd..000000000000
--- a/arch/arm/mm/copypage-v4wb.S
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15
16 .text
17 .align 5
18/*
19 * ARMv4 optimised copy_user_page
20 *
21 * We flush the destination cache lines just before we write the data into the
22 * corresponding address. Since the Dcache is read-allocate, this removes the
23 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
24 * and merged as appropriate.
25 *
26 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
27 * instruction. If your processor does not supply this, you have to write your
28 * own copy_user_page that does the right thing.
29 */
30ENTRY(v4wb_copy_user_page)
31 stmfd sp!, {r4, lr} @ 2
32 mov r2, #PAGE_SZ/64 @ 1
33 ldmia r1!, {r3, r4, ip, lr} @ 4
341: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
35 stmia r0!, {r3, r4, ip, lr} @ 4
36 ldmia r1!, {r3, r4, ip, lr} @ 4+1
37 stmia r0!, {r3, r4, ip, lr} @ 4
38 ldmia r1!, {r3, r4, ip, lr} @ 4
39 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
40 stmia r0!, {r3, r4, ip, lr} @ 4
41 ldmia r1!, {r3, r4, ip, lr} @ 4
42 subs r2, r2, #1 @ 1
43 stmia r0!, {r3, r4, ip, lr} @ 4
44 ldmneia r1!, {r3, r4, ip, lr} @ 4
45 bne 1b @ 1
46 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
47 ldmfd sp!, {r4, pc} @ 3
48
49 .align 5
50/*
51 * ARMv4 optimised clear_user_page
52 *
53 * Same story as above.
54 */
55ENTRY(v4wb_clear_user_page)
56 str lr, [sp, #-4]!
57 mov r1, #PAGE_SZ/64 @ 1
58 mov r2, #0 @ 1
59 mov r3, #0 @ 1
60 mov ip, #0 @ 1
61 mov lr, #0 @ 1
621: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
63 stmia r0!, {r2, r3, ip, lr} @ 4
64 stmia r0!, {r2, r3, ip, lr} @ 4
65 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line
66 stmia r0!, {r2, r3, ip, lr} @ 4
67 stmia r0!, {r2, r3, ip, lr} @ 4
68 subs r1, r1, #1 @ 1
69 bne 1b @ 1
70 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB
71 ldr pc, [sp], #4
72
73 __INITDATA
74
75 .type v4wb_user_fns, #object
76ENTRY(v4wb_user_fns)
77 .long v4wb_clear_user_page
78 .long v4wb_copy_user_page
79 .size v4wb_user_fns, . - v4wb_user_fns
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
new file mode 100644
index 000000000000..230210822961
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -0,0 +1,83 @@
1/*
2 * linux/arch/arm/mm/copypage-v4wb.c
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/init.h>
11
12#include <asm/page.h>
13
14/*
15 * ARMv4 optimised copy_user_page
16 *
17 * We flush the destination cache lines just before we write the data into the
18 * corresponding address. Since the Dcache is read-allocate, this removes the
19 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
20 * and merged as appropriate.
21 *
22 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
23 * instruction. If your processor does not supply this, you have to write your
24 * own copy_user_page that does the right thing.
25 */
26void __attribute__((naked))
27v4wb_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
28{
29 asm("\
30 stmfd sp!, {r4, lr} @ 2\n\
31 mov r2, %0 @ 1\n\
32 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
331: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
34 stmia r0!, {r3, r4, ip, lr} @ 4\n\
35 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
36 stmia r0!, {r3, r4, ip, lr} @ 4\n\
37 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
38 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
39 stmia r0!, {r3, r4, ip, lr} @ 4\n\
40 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
41 subs r2, r2, #1 @ 1\n\
42 stmia r0!, {r3, r4, ip, lr} @ 4\n\
43 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
44 bne 1b @ 1\n\
45 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
46 ldmfd sp!, {r4, pc} @ 3"
47 :
48 : "I" (PAGE_SIZE / 64));
49}
50
51/*
52 * ARMv4 optimised clear_user_page
53 *
54 * Same story as above.
55 */
56void __attribute__((naked))
57v4wb_clear_user_page(void *kaddr, unsigned long vaddr)
58{
59 asm("\
60 str lr, [sp, #-4]!\n\
61 mov r1, %0 @ 1\n\
62 mov r2, #0 @ 1\n\
63 mov r3, #0 @ 1\n\
64 mov ip, #0 @ 1\n\
65 mov lr, #0 @ 1\n\
661: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
67 stmia r0!, {r2, r3, ip, lr} @ 4\n\
68 stmia r0!, {r2, r3, ip, lr} @ 4\n\
69 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
70 stmia r0!, {r2, r3, ip, lr} @ 4\n\
71 stmia r0!, {r2, r3, ip, lr} @ 4\n\
72 subs r1, r1, #1 @ 1\n\
73 bne 1b @ 1\n\
74 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
75 ldr pc, [sp], #4"
76 :
77 : "I" (PAGE_SIZE / 64));
78}
79
80struct cpu_user_fns v4wb_user_fns __initdata = {
81 .cpu_clear_user_page = v4wb_clear_user_page,
82 .cpu_copy_user_page = v4wb_copy_user_page,
83};
diff --git a/arch/arm/mm/copypage-v4wt.S b/arch/arm/mm/copypage-v4wt.S
deleted file mode 100644
index e1f2af28d549..000000000000
--- a/arch/arm/mm/copypage-v4wt.S
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-v4.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ASM optimised string functions
11 *
12 * This is for CPUs with a writethrough cache and 'flush ID cache' is
13 * the only supported cache operation.
14 */
15#include <linux/linkage.h>
16#include <linux/init.h>
17#include <asm/asm-offsets.h>
18
19 .text
20 .align 5
21/*
22 * ARMv4 optimised copy_user_page
23 *
24 * Since we have writethrough caches, we don't have to worry about
25 * dirty data in the cache. However, we do have to ensure that
26 * subsequent reads are up to date.
27 */
28ENTRY(v4wt_copy_user_page)
29 stmfd sp!, {r4, lr} @ 2
30 mov r2, #PAGE_SZ/64 @ 1
31 ldmia r1!, {r3, r4, ip, lr} @ 4
321: stmia r0!, {r3, r4, ip, lr} @ 4
33 ldmia r1!, {r3, r4, ip, lr} @ 4+1
34 stmia r0!, {r3, r4, ip, lr} @ 4
35 ldmia r1!, {r3, r4, ip, lr} @ 4
36 stmia r0!, {r3, r4, ip, lr} @ 4
37 ldmia r1!, {r3, r4, ip, lr} @ 4
38 subs r2, r2, #1 @ 1
39 stmia r0!, {r3, r4, ip, lr} @ 4
40 ldmneia r1!, {r3, r4, ip, lr} @ 4
41 bne 1b @ 1
42 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
43 ldmfd sp!, {r4, pc} @ 3
44
45 .align 5
46/*
47 * ARMv4 optimised clear_user_page
48 *
49 * Same story as above.
50 */
51ENTRY(v4wt_clear_user_page)
52 str lr, [sp, #-4]!
53 mov r1, #PAGE_SZ/64 @ 1
54 mov r2, #0 @ 1
55 mov r3, #0 @ 1
56 mov ip, #0 @ 1
57 mov lr, #0 @ 1
581: stmia r0!, {r2, r3, ip, lr} @ 4
59 stmia r0!, {r2, r3, ip, lr} @ 4
60 stmia r0!, {r2, r3, ip, lr} @ 4
61 stmia r0!, {r2, r3, ip, lr} @ 4
62 subs r1, r1, #1 @ 1
63 bne 1b @ 1
64 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache
65 ldr pc, [sp], #4
66
67 __INITDATA
68
69 .type v4wt_user_fns, #object
70ENTRY(v4wt_user_fns)
71 .long v4wt_clear_user_page
72 .long v4wt_copy_user_page
73 .size v4wt_user_fns, . - v4wt_user_fns
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
new file mode 100644
index 000000000000..d8ef39503ff0
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -0,0 +1,77 @@
1/*
2 * linux/arch/arm/mm/copypage-v4wt.S
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This is for CPUs with a writethrough cache and 'flush ID cache' is
11 * the only supported cache operation.
12 */
13#include <linux/init.h>
14
15#include <asm/page.h>
16
17/*
18 * ARMv4 optimised copy_user_page
19 *
20 * Since we have writethrough caches, we don't have to worry about
21 * dirty data in the cache. However, we do have to ensure that
22 * subsequent reads are up to date.
23 */
24void __attribute__((naked))
25v4wt_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
26{
27 asm("\
28 stmfd sp!, {r4, lr} @ 2\n\
29 mov r2, %0 @ 1\n\
30 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
311: stmia r0!, {r3, r4, ip, lr} @ 4\n\
32 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
33 stmia r0!, {r3, r4, ip, lr} @ 4\n\
34 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
35 stmia r0!, {r3, r4, ip, lr} @ 4\n\
36 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
37 subs r2, r2, #1 @ 1\n\
38 stmia r0!, {r3, r4, ip, lr} @ 4\n\
39 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
40 bne 1b @ 1\n\
41 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
42 ldmfd sp!, {r4, pc} @ 3"
43 :
44 : "I" (PAGE_SIZE / 64));
45}
46
47/*
48 * ARMv4 optimised clear_user_page
49 *
50 * Same story as above.
51 */
52void __attribute__((naked))
53v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
54{
55 asm("\
56 str lr, [sp, #-4]!\n\
57 mov r1, %0 @ 1\n\
58 mov r2, #0 @ 1\n\
59 mov r3, #0 @ 1\n\
60 mov ip, #0 @ 1\n\
61 mov lr, #0 @ 1\n\
621: stmia r0!, {r2, r3, ip, lr} @ 4\n\
63 stmia r0!, {r2, r3, ip, lr} @ 4\n\
64 stmia r0!, {r2, r3, ip, lr} @ 4\n\
65 stmia r0!, {r2, r3, ip, lr} @ 4\n\
66 subs r1, r1, #1 @ 1\n\
67 bne 1b @ 1\n\
68 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
69 ldr pc, [sp], #4"
70 :
71 : "I" (PAGE_SIZE / 64));
72}
73
74struct cpu_user_fns v4wt_user_fns __initdata = {
75 .cpu_clear_user_page = v4wt_clear_user_page,
76 .cpu_copy_user_page = v4wt_copy_user_page,
77};
diff --git a/arch/arm/mm/copypage-xsc3.S b/arch/arm/mm/copypage-xsc3.S
deleted file mode 100644
index 9a2cb4332b4c..000000000000
--- a/arch/arm/mm/copypage-xsc3.S
+++ /dev/null
@@ -1,97 +0,0 @@
1/*
2 * linux/arch/arm/lib/copypage-xsc3.S
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adapted for 3rd gen XScale core, no more mini-dcache
11 * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
12 */
13
14#include <linux/linkage.h>
15#include <linux/init.h>
16#include <asm/asm-offsets.h>
17
18/*
19 * General note:
20 * We don't really want write-allocate cache behaviour for these functions
21 * since that will just eat through 8K of the cache.
22 */
23
24 .text
25 .align 5
26/*
27 * XSC3 optimised copy_user_page
28 * r0 = destination
29 * r1 = source
30 * r2 = virtual user address of ultimate destination page
31 *
32 * The source page may have some clean entries in the cache already, but we
33 * can safely ignore them - break_cow() will flush them out of the cache
34 * if we eventually end up using our copied page.
35 *
36 */
37ENTRY(xsc3_mc_copy_user_page)
38 stmfd sp!, {r4, r5, lr}
39 mov lr, #PAGE_SZ/64-1
40
41 pld [r1, #0]
42 pld [r1, #32]
431: pld [r1, #64]
44 pld [r1, #96]
45
462: ldrd r2, [r1], #8
47 mov ip, r0
48 ldrd r4, [r1], #8
49 mcr p15, 0, ip, c7, c6, 1 @ invalidate
50 strd r2, [r0], #8
51 ldrd r2, [r1], #8
52 strd r4, [r0], #8
53 ldrd r4, [r1], #8
54 strd r2, [r0], #8
55 strd r4, [r0], #8
56 ldrd r2, [r1], #8
57 mov ip, r0
58 ldrd r4, [r1], #8
59 mcr p15, 0, ip, c7, c6, 1 @ invalidate
60 strd r2, [r0], #8
61 ldrd r2, [r1], #8
62 subs lr, lr, #1
63 strd r4, [r0], #8
64 ldrd r4, [r1], #8
65 strd r2, [r0], #8
66 strd r4, [r0], #8
67 bgt 1b
68 beq 2b
69
70 ldmfd sp!, {r4, r5, pc}
71
72 .align 5
73/*
74 * XScale optimised clear_user_page
75 * r0 = destination
76 * r1 = virtual user address of ultimate destination page
77 */
78ENTRY(xsc3_mc_clear_user_page)
79 mov r1, #PAGE_SZ/32
80 mov r2, #0
81 mov r3, #0
821: mcr p15, 0, r0, c7, c6, 1 @ invalidate line
83 strd r2, [r0], #8
84 strd r2, [r0], #8
85 strd r2, [r0], #8
86 strd r2, [r0], #8
87 subs r1, r1, #1
88 bne 1b
89 mov pc, lr
90
91 __INITDATA
92
93 .type xsc3_mc_user_fns, #object
94ENTRY(xsc3_mc_user_fns)
95 .long xsc3_mc_clear_user_page
96 .long xsc3_mc_copy_user_page
97 .size xsc3_mc_user_fns, . - xsc3_mc_user_fns
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
new file mode 100644
index 000000000000..51ed502e5777
--- /dev/null
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -0,0 +1,102 @@
1/*
2 * linux/arch/arm/mm/copypage-xsc3.S
3 *
4 * Copyright (C) 2004 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adapted for 3rd gen XScale core, no more mini-dcache
11 * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
12 */
13#include <linux/init.h>
14
15#include <asm/page.h>
16
17/*
18 * General note:
19 * We don't really want write-allocate cache behaviour for these functions
20 * since that will just eat through 8K of the cache.
21 */
22
23/*
24 * XSC3 optimised copy_user_page
25 * r0 = destination
26 * r1 = source
27 * r2 = virtual user address of ultimate destination page
28 *
29 * The source page may have some clean entries in the cache already, but we
30 * can safely ignore them - break_cow() will flush them out of the cache
31 * if we eventually end up using our copied page.
32 *
33 */
34void __attribute__((naked))
35xsc3_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
36{
37 asm("\
38 stmfd sp!, {r4, r5, lr} \n\
39 mov lr, %0 \n\
40 \n\
41 pld [r1, #0] \n\
42 pld [r1, #32] \n\
431: pld [r1, #64] \n\
44 pld [r1, #96] \n\
45 \n\
462: ldrd r2, [r1], #8 \n\
47 mov ip, r0 \n\
48 ldrd r4, [r1], #8 \n\
49 mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
50 strd r2, [r0], #8 \n\
51 ldrd r2, [r1], #8 \n\
52 strd r4, [r0], #8 \n\
53 ldrd r4, [r1], #8 \n\
54 strd r2, [r0], #8 \n\
55 strd r4, [r0], #8 \n\
56 ldrd r2, [r1], #8 \n\
57 mov ip, r0 \n\
58 ldrd r4, [r1], #8 \n\
59 mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
60 strd r2, [r0], #8 \n\
61 ldrd r2, [r1], #8 \n\
62 subs lr, lr, #1 \n\
63 strd r4, [r0], #8 \n\
64 ldrd r4, [r1], #8 \n\
65 strd r2, [r0], #8 \n\
66 strd r4, [r0], #8 \n\
67 bgt 1b \n\
68 beq 2b \n\
69 \n\
70 ldmfd sp!, {r4, r5, pc}"
71 :
72 : "I" (PAGE_SIZE / 64 - 1));
73}
74
75/*
76 * XScale optimised clear_user_page
77 * r0 = destination
78 * r1 = virtual user address of ultimate destination page
79 */
80void __attribute__((naked))
81xsc3_mc_clear_user_page(void *kaddr, unsigned long vaddr)
82{
83 asm("\
84 mov r1, %0 \n\
85 mov r2, #0 \n\
86 mov r3, #0 \n\
871: mcr p15, 0, r0, c7, c6, 1 @ invalidate line\n\
88 strd r2, [r0], #8 \n\
89 strd r2, [r0], #8 \n\
90 strd r2, [r0], #8 \n\
91 strd r2, [r0], #8 \n\
92 subs r1, r1, #1 \n\
93 bne 1b \n\
94 mov pc, lr"
95 :
96 : "I" (PAGE_SIZE / 32));
97}
98
99struct cpu_user_fns xsc3_mc_user_fns __initdata = {
100 .cpu_clear_user_page = xsc3_mc_clear_user_page,
101 .cpu_copy_user_page = xsc3_mc_copy_user_page,
102};