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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-06-30 11:29:12 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-07-18 07:29:04 -0400
commit6ebbf2ce437b33022d30badd49dc94d33ecfa498 (patch)
treebc015e35b456a28bb0e501803a454dc0c0d3291a /arch/arm/mm/proc-v7m.S
parentaf040ffc9ba1e079ee4c0748aff64fa3d4716fa5 (diff)
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-v7m.S')
-rw-r--r--arch/arm/mm/proc-v7m.S18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 1ca37c72f12f..d1e68b553d3b 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -16,11 +16,11 @@
16#include "proc-macros.S" 16#include "proc-macros.S"
17 17
18ENTRY(cpu_v7m_proc_init) 18ENTRY(cpu_v7m_proc_init)
19 mov pc, lr 19 ret lr
20ENDPROC(cpu_v7m_proc_init) 20ENDPROC(cpu_v7m_proc_init)
21 21
22ENTRY(cpu_v7m_proc_fin) 22ENTRY(cpu_v7m_proc_fin)
23 mov pc, lr 23 ret lr
24ENDPROC(cpu_v7m_proc_fin) 24ENDPROC(cpu_v7m_proc_fin)
25 25
26/* 26/*
@@ -34,7 +34,7 @@ ENDPROC(cpu_v7m_proc_fin)
34 */ 34 */
35 .align 5 35 .align 5
36ENTRY(cpu_v7m_reset) 36ENTRY(cpu_v7m_reset)
37 mov pc, r0 37 ret r0
38ENDPROC(cpu_v7m_reset) 38ENDPROC(cpu_v7m_reset)
39 39
40/* 40/*
@@ -46,18 +46,18 @@ ENDPROC(cpu_v7m_reset)
46 */ 46 */
47ENTRY(cpu_v7m_do_idle) 47ENTRY(cpu_v7m_do_idle)
48 wfi 48 wfi
49 mov pc, lr 49 ret lr
50ENDPROC(cpu_v7m_do_idle) 50ENDPROC(cpu_v7m_do_idle)
51 51
52ENTRY(cpu_v7m_dcache_clean_area) 52ENTRY(cpu_v7m_dcache_clean_area)
53 mov pc, lr 53 ret lr
54ENDPROC(cpu_v7m_dcache_clean_area) 54ENDPROC(cpu_v7m_dcache_clean_area)
55 55
56/* 56/*
57 * There is no MMU, so here is nothing to do. 57 * There is no MMU, so here is nothing to do.
58 */ 58 */
59ENTRY(cpu_v7m_switch_mm) 59ENTRY(cpu_v7m_switch_mm)
60 mov pc, lr 60 ret lr
61ENDPROC(cpu_v7m_switch_mm) 61ENDPROC(cpu_v7m_switch_mm)
62 62
63.globl cpu_v7m_suspend_size 63.globl cpu_v7m_suspend_size
@@ -65,11 +65,11 @@ ENDPROC(cpu_v7m_switch_mm)
65 65
66#ifdef CONFIG_ARM_CPU_SUSPEND 66#ifdef CONFIG_ARM_CPU_SUSPEND
67ENTRY(cpu_v7m_do_suspend) 67ENTRY(cpu_v7m_do_suspend)
68 mov pc, lr 68 ret lr
69ENDPROC(cpu_v7m_do_suspend) 69ENDPROC(cpu_v7m_do_suspend)
70 70
71ENTRY(cpu_v7m_do_resume) 71ENTRY(cpu_v7m_do_resume)
72 mov pc, lr 72 ret lr
73ENDPROC(cpu_v7m_do_resume) 73ENDPROC(cpu_v7m_do_resume)
74#endif 74#endif
75 75
@@ -120,7 +120,7 @@ __v7m_setup:
120 ldr r12, [r0, V7M_SCB_CCR] @ system control register 120 ldr r12, [r0, V7M_SCB_CCR] @ system control register
121 orr r12, #V7M_SCB_CCR_STKALIGN 121 orr r12, #V7M_SCB_CCR_STKALIGN
122 str r12, [r0, V7M_SCB_CCR] 122 str r12, [r0, V7M_SCB_CCR]
123 mov pc, lr 123 ret lr
124ENDPROC(__v7m_setup) 124ENDPROC(__v7m_setup)
125 125
126 .align 2 126 .align 2