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authorLennert Buytenhek <buytenh@wantstofly.org>2006-04-01 18:07:39 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-01 18:07:39 -0500
commit23759dc6430428897a36c4d493f611eca55c9481 (patch)
treec62050927599b36ed223753c35fd737e3c0c6762 /arch/arm/mm/mm-armv.c
parentd3f4c571b6e596f9d39c596426269006a309d3b8 (diff)
[ARM] 3439/2: xsc3: add I/O coherency support
Patch from Lennert Buytenhek This patch adds support for the I/O coherent cache available on the xsc3. The approach is to provide a simple API to determine whether the chipset supports coherency by calling arch_is_coherent() and then setting the appropriate system memory PTE and PMD bits. In addition, we call this API on dma_alloc_coherent() and dma_map_single() calls. A generic version exists that will compile out all the coherency-related code that is not needed on the majority of ARM systems. Note that we do not check for coherency in the dma_alloc_writecombine() function as that still requires a special PTE setting. We also don't touch dma_mmap_coherent() as that is a special ARM-only API that is by definition only used on non-coherent system. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/mm-armv.c')
-rw-r--r--arch/arm/mm/mm-armv.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 5e5d05bcad50..f14b2d0f3690 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -389,6 +389,17 @@ void __init build_mem_type_table(void)
389 kern_pgprot = user_pgprot = cp->pte; 389 kern_pgprot = user_pgprot = cp->pte;
390 390
391 /* 391 /*
392 * Enable CPU-specific coherency if supported.
393 * (Only available on XSC3 at the moment.)
394 */
395 if (arch_is_coherent()) {
396 if (cpu_is_xsc3()) {
397 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
398 mem_types[MT_MEMORY].prot_pte |= L_PTE_COHERENT;
399 }
400 }
401
402 /*
392 * ARMv6 and above have extended page tables. 403 * ARMv6 and above have extended page tables.
393 */ 404 */
394 if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { 405 if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) {