diff options
author | Chao Xie <xiechao.mail@gmail.com> | 2012-07-31 02:13:11 -0400 |
---|---|---|
committer | Haojian Zhuang <haojian.zhuang@gmail.com> | 2012-08-16 04:16:17 -0400 |
commit | fa79b8d6a2f38bf2c612acf38787a7fcf60c5db7 (patch) | |
tree | 0f3104ca394ef10980b5f6c7fa553b49f16e0bfb /arch/arm/mm/cache-tauros2.c | |
parent | 5967b546dd7142e7747993bb4c79422cd7b6f34f (diff) |
ARM: cache: add cputype.h for tauros2
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/mm/cache-tauros2.c')
-rw-r--r-- | arch/arm/mm/cache-tauros2.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c index 97e2ac81399f..4b787bba2b58 100644 --- a/arch/arm/mm/cache-tauros2.c +++ b/arch/arm/mm/cache-tauros2.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
19 | #include <asm/cp15.h> | 19 | #include <asm/cp15.h> |
20 | #include <asm/cputype.h> | ||
20 | #include <asm/hardware/cache-tauros2.h> | 21 | #include <asm/hardware/cache-tauros2.h> |
21 | 22 | ||
22 | 23 | ||
@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void) | |||
161 | 162 | ||
162 | static inline int __init cpuid_scheme(void) | 163 | static inline int __init cpuid_scheme(void) |
163 | { | 164 | { |
164 | extern int processor_id; | ||
165 | |||
166 | return !!((processor_id & 0x000f0000) == 0x000f0000); | 165 | return !!((processor_id & 0x000f0000) == 0x000f0000); |
167 | } | 166 | } |
168 | 167 | ||
@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr) | |||
191 | 190 | ||
192 | void __init tauros2_init(void) | 191 | void __init tauros2_init(void) |
193 | { | 192 | { |
194 | extern int processor_id; | ||
195 | char *mode = NULL; | 193 | char *mode = NULL; |
196 | 194 | ||
197 | disable_l2_prefetch(); | 195 | disable_l2_prefetch(); |