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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-05-04 07:04:26 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-05-05 00:50:50 -0400
commit357c9c1f07d4546bc3fbc0fd1044d96b114d14ed (patch)
treea355e9cd73ab9f7b536b4c7562d931cfb3f5a885 /arch/arm/mm/Makefile
parent69964ea4c7b68c9399f7977aa5b9aa6539a6a98a (diff)
ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs
This patch removes support for ARMv3 CPUs, which haven't worked properly for quite some time (see the FIXME comment in arch/arm/mm/fault.c). The only V3 parts left is the cache model for ARMv3, which is needed for some odd reason by ARM740T CPUs, and being able to build with -march=armv3, which is required for the RiscPC platform due to its bus structure. Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Makefile')
-rw-r--r--arch/arm/mm/Makefile4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index bca7e61928c7..8a9c4cb50a93 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -44,7 +44,6 @@ obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
44AFLAGS_cache-v6.o :=-Wa,-march=armv6 44AFLAGS_cache-v6.o :=-Wa,-march=armv6
45AFLAGS_cache-v7.o :=-Wa,-march=armv7-a 45AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
46 46
47obj-$(CONFIG_CPU_COPY_V3) += copypage-v3.o
48obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o 47obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
49obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o 48obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o
50obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o 49obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o
@@ -54,7 +53,6 @@ obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o
54obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o 53obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o
55obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o 54obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o
56 55
57obj-$(CONFIG_CPU_TLB_V3) += tlb-v3.o
58obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o 56obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o
59obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o 57obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o
60obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o 58obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o
@@ -66,8 +64,6 @@ obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o
66AFLAGS_tlb-v6.o :=-Wa,-march=armv6 64AFLAGS_tlb-v6.o :=-Wa,-march=armv6
67AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a 65AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
68 66
69obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o
70obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o
71obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o 67obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
72obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o 68obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
73obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o 69obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o