diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2010-06-21 10:10:07 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-01 05:12:31 -0400 |
commit | ad642d9f58f1af6e96efccb5f84e52c6d01db5c4 (patch) | |
tree | 4319ed1e81f50c7035457cc0fa1cf4bcdf760abb /arch/arm/mm/Kconfig | |
parent | ca57926d53580f7c950496cb7ef6d7930610e1dd (diff) |
ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
Commit f4d6477f introduced a workaround for the lack of hardware
broadcasting of the cache maintenance operations on ARM11MPCore.
However, the workaround is only valid on CPUs that do not do speculative
loads into the D-cache.
This patch adds a Kconfig option with the corresponding help to make the
above clear. When the DMA_CACHE_RWFO option is disabled, the kernel
behaviour is that prior to the f4d6477f commit. This also allows ARMv6
UP processors with speculative loads to work correctly.
For other processors, a different workaround may be needed.
Cc: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r-- | arch/arm/mm/Kconfig | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 346ae14824a5..fc1b2fa59429 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -735,6 +735,25 @@ config NEEDS_SYSCALL_FOR_CMPXCHG | |||
735 | Forget about fast user space cmpxchg support. | 735 | Forget about fast user space cmpxchg support. |
736 | It is just not possible. | 736 | It is just not possible. |
737 | 737 | ||
738 | config DMA_CACHE_RWFO | ||
739 | bool "Enable read/write for ownership DMA cache maintenance" | ||
740 | depends on CPU_V6 && SMP | ||
741 | default y | ||
742 | help | ||
743 | The Snoop Control Unit on ARM11MPCore does not detect the | ||
744 | cache maintenance operations and the dma_{map,unmap}_area() | ||
745 | functions may leave stale cache entries on other CPUs. By | ||
746 | enabling this option, Read or Write For Ownership in the ARMv6 | ||
747 | DMA cache maintenance functions is performed. These LDR/STR | ||
748 | instructions change the cache line state to shared or modified | ||
749 | so that the cache operation has the desired effect. | ||
750 | |||
751 | Note that the workaround is only valid on processors that do | ||
752 | not perform speculative loads into the D-cache. For such | ||
753 | processors, if cache maintenance operations are not broadcast | ||
754 | in hardware, other workarounds are needed (e.g. cache | ||
755 | maintenance broadcasting in software via FIQ). | ||
756 | |||
738 | config OUTER_CACHE | 757 | config OUTER_CACHE |
739 | bool | 758 | bool |
740 | 759 | ||