diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-18 06:40:46 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-25 06:04:01 -0500 |
commit | 0dada61a29ddaaca5985c76aafec341b4ad3e989 (patch) | |
tree | d34e8b34f9f9ed0dd01004c3dec91e41cc8eaff4 /arch/arm/mach-versatile | |
parent | 8a47ae8b96640bc9f049dce0d8ba6980176da0ea (diff) |
ARM: amba: integrator/realview/versatile/vexpress: get rid of NO_IRQ initializers
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-versatile')
-rw-r--r-- | arch/arm/mach-versatile/core.c | 34 | ||||
-rw-r--r-- | arch/arm/mach-versatile/versatile_pb.c | 8 |
2 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..358cc0bc069b 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -582,36 +582,36 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
582 | .num_chipselect = 1, | 582 | .num_chipselect = 1, |
583 | }; | 583 | }; |
584 | 584 | ||
585 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } | 585 | #define AACI_IRQ { IRQ_AACI } |
586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } | 586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
587 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } | 587 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
588 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } | 588 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
589 | 589 | ||
590 | /* | 590 | /* |
591 | * These devices are connected directly to the multi-layer AHB switch | 591 | * These devices are connected directly to the multi-layer AHB switch |
592 | */ | 592 | */ |
593 | #define SMC_IRQ { NO_IRQ, NO_IRQ } | 593 | #define SMC_IRQ { } |
594 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 594 | #define MPMC_IRQ { } |
595 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } | 595 | #define CLCD_IRQ { IRQ_CLCDINT } |
596 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } | 596 | #define DMAC_IRQ { IRQ_DMAINT } |
597 | 597 | ||
598 | /* | 598 | /* |
599 | * These devices are connected via the core APB bridge | 599 | * These devices are connected via the core APB bridge |
600 | */ | 600 | */ |
601 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 601 | #define SCTL_IRQ { } |
602 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } | 602 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
603 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } | 603 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
604 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } | 604 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
605 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } | 605 | #define RTC_IRQ { IRQ_RTCINT } |
606 | 606 | ||
607 | /* | 607 | /* |
608 | * These devices are connected via the DMA APB bridge | 608 | * These devices are connected via the DMA APB bridge |
609 | */ | 609 | */ |
610 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } | 610 | #define SCI_IRQ { IRQ_SCIINT } |
611 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } | 611 | #define UART0_IRQ { IRQ_UARTINT0 } |
612 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } | 612 | #define UART1_IRQ { IRQ_UARTINT1 } |
613 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } | 613 | #define UART2_IRQ { IRQ_UARTINT2 } |
614 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } | 614 | #define SSP_IRQ { IRQ_SSPINT } |
615 | 615 | ||
616 | /* FPGA Primecells */ | 616 | /* FPGA Primecells */ |
617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); | 617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); |
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..1a5fe6eec337 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -58,15 +58,15 @@ static struct pl061_platform_data gpio3_plat_data = { | |||
58 | .irq_base = IRQ_GPIO3_START, | 58 | .irq_base = IRQ_GPIO3_START, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | 61 | #define UART3_IRQ { IRQ_SIC_UART3 } |
62 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | 62 | #define SCI1_IRQ { IRQ_SIC_SCI3 } |
63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | 63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * These devices are connected via the core APB bridge | 66 | * These devices are connected via the core APB bridge |
67 | */ | 67 | */ |
68 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | 68 | #define GPIO2_IRQ { IRQ_GPIOINT2 } |
69 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | 69 | #define GPIO3_IRQ { IRQ_GPIOINT3 } |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * These devices are connected via the DMA APB bridge | 72 | * These devices are connected via the DMA APB bridge |