aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-versatile
diff options
context:
space:
mode:
authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/arm/mach-versatile
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'arch/arm/mach-versatile')
-rw-r--r--arch/arm/mach-versatile/Kconfig11
-rw-r--r--arch/arm/mach-versatile/core.c336
-rw-r--r--arch/arm/mach-versatile/core.h2
-rw-r--r--arch/arm/mach-versatile/include/mach/debug-macro.S12
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-versatile/include/mach/memory.h2
-rw-r--r--arch/arm/mach-versatile/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c3
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c8
9 files changed, 100 insertions, 278 deletions
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index c781f30c8368..9cdec5aa04a0 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -2,16 +2,19 @@ menu "Versatile platform type"
2 depends on ARCH_VERSATILE 2 depends on ARCH_VERSATILE
3 3
4config ARCH_VERSATILE_PB 4config ARCH_VERSATILE_PB
5 bool "Support Versatile/PB platform" 5 bool "Support Versatile Platform Baseboard for ARM926EJ-S"
6 select CPU_ARM926T 6 select CPU_ARM926T
7 select MIGHT_HAVE_PCI
7 default y 8 default y
8 help 9 help
9 Include support for the ARM(R) Versatile/PB platform. 10 Include support for the ARM(R) Versatile Platform Baseboard
11 for the ARM926EJ-S.
10 12
11config MACH_VERSATILE_AB 13config MACH_VERSATILE_AB
12 bool "Support Versatile/AB platform" 14 bool "Support Versatile Application Baseboard for ARM926EJ-S"
13 select CPU_ARM926T 15 select CPU_ARM926T
14 help 16 help
15 Include support for the ARM(R) Versatile/AP platform. 17 Include support for the ARM(R) Versatile Application Baseboard
18 for the ARM926EJ-S.
16 19
17endmenu 20endmenu
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index e38acb0f89c8..0c99cf076c63 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,8 +31,9 @@
31#include <linux/amba/pl022.h> 31#include <linux/amba/pl022.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/gfp.h> 33#include <linux/gfp.h>
34#include <linux/clkdev.h>
35#include <linux/mtd/physmap.h>
34 36
35#include <asm/clkdev.h>
36#include <asm/system.h> 37#include <asm/system.h>
37#include <asm/irq.h> 38#include <asm/irq.h>
38#include <asm/leds.h> 39#include <asm/leds.h>
@@ -42,14 +43,16 @@
42#include <asm/mach-types.h> 43#include <asm/mach-types.h>
43 44
44#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
45#include <asm/mach/flash.h>
46#include <asm/mach/irq.h> 46#include <asm/mach/irq.h>
47#include <asm/mach/time.h> 47#include <asm/mach/time.h>
48#include <asm/mach/map.h> 48#include <asm/mach/map.h>
49#include <mach/clkdev.h>
50#include <mach/hardware.h> 49#include <mach/hardware.h>
51#include <mach/platform.h> 50#include <mach/platform.h>
52#include <plat/timer-sp.h> 51#include <asm/hardware/timer-sp.h>
52
53#include <plat/clcd.h>
54#include <plat/fpga-irq.h>
55#include <plat/sched_clock.h>
53 56
54#include "core.h" 57#include "core.h"
55 58
@@ -62,45 +65,12 @@
62#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) 65#define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE)
63#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) 66#define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE)
64 67
65static void sic_mask_irq(unsigned int irq) 68static struct fpga_irq_data sic_irq = {
66{ 69 .base = VA_SIC_BASE,
67 irq -= IRQ_SIC_START; 70 .irq_start = IRQ_SIC_START,
68 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 71 .chip.name = "SIC",
69}
70
71static void sic_unmask_irq(unsigned int irq)
72{
73 irq -= IRQ_SIC_START;
74 writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
75}
76
77static struct irq_chip sic_chip = {
78 .name = "SIC",
79 .ack = sic_mask_irq,
80 .mask = sic_mask_irq,
81 .unmask = sic_unmask_irq,
82}; 72};
83 73
84static void
85sic_handle_irq(unsigned int irq, struct irq_desc *desc)
86{
87 unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
88
89 if (status == 0) {
90 do_bad_IRQ(irq, desc);
91 return;
92 }
93
94 do {
95 irq = ffs(status) - 1;
96 status &= ~(1 << irq);
97
98 irq += IRQ_SIC_START;
99
100 generic_handle_irq(irq);
101 } while (status);
102}
103
104#if 1 74#if 1
105#define IRQ_MMCI0A IRQ_VICSOURCE22 75#define IRQ_MMCI0A IRQ_VICSOURCE22
106#define IRQ_AACI IRQ_VICSOURCE24 76#define IRQ_AACI IRQ_VICSOURCE24
@@ -115,22 +85,11 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
115 85
116void __init versatile_init_irq(void) 86void __init versatile_init_irq(void)
117{ 87{
118 unsigned int i;
119
120 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); 88 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
121 89
122 set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
123
124 /* Do second interrupt controller */
125 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 90 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
126 91
127 for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { 92 fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq);
128 if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) {
129 set_irq_chip(i, &sic_chip);
130 set_irq_handler(i, handle_level_irq);
131 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
132 }
133 }
134 93
135 /* 94 /*
136 * Interrupts on secondary controller from 0 to 8 are routed to 95 * Interrupts on secondary controller from 0 to 8 are routed to
@@ -231,27 +190,7 @@ void __init versatile_map_io(void)
231 190
232#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET) 191#define VERSATILE_FLASHCTRL (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_FLASH_OFFSET)
233 192
234static int versatile_flash_init(void) 193static void versatile_flash_set_vpp(struct platform_device *pdev, int on)
235{
236 u32 val;
237
238 val = __raw_readl(VERSATILE_FLASHCTRL);
239 val &= ~VERSATILE_FLASHPROG_FLVPPEN;
240 __raw_writel(val, VERSATILE_FLASHCTRL);
241
242 return 0;
243}
244
245static void versatile_flash_exit(void)
246{
247 u32 val;
248
249 val = __raw_readl(VERSATILE_FLASHCTRL);
250 val &= ~VERSATILE_FLASHPROG_FLVPPEN;
251 __raw_writel(val, VERSATILE_FLASHCTRL);
252}
253
254static void versatile_flash_set_vpp(int on)
255{ 194{
256 u32 val; 195 u32 val;
257 196
@@ -263,11 +202,8 @@ static void versatile_flash_set_vpp(int on)
263 __raw_writel(val, VERSATILE_FLASHCTRL); 202 __raw_writel(val, VERSATILE_FLASHCTRL);
264} 203}
265 204
266static struct flash_platform_data versatile_flash_data = { 205static struct physmap_flash_data versatile_flash_data = {
267 .map_name = "cfi_probe",
268 .width = 4, 206 .width = 4,
269 .init = versatile_flash_init,
270 .exit = versatile_flash_exit,
271 .set_vpp = versatile_flash_set_vpp, 207 .set_vpp = versatile_flash_set_vpp,
272}; 208};
273 209
@@ -278,7 +214,7 @@ static struct resource versatile_flash_resource = {
278}; 214};
279 215
280static struct platform_device versatile_flash_device = { 216static struct platform_device versatile_flash_device = {
281 .name = "armflash", 217 .name = "physmap-flash",
282 .id = 0, 218 .id = 0,
283 .dev = { 219 .dev = {
284 .platform_data = &versatile_flash_data, 220 .platform_data = &versatile_flash_data,
@@ -416,6 +352,10 @@ static struct clk ref24_clk = {
416 .rate = 24000000, 352 .rate = 24000000,
417}; 353};
418 354
355static struct clk sp804_clk = {
356 .rate = 1000000,
357};
358
419static struct clk dummy_apb_pclk; 359static struct clk dummy_apb_pclk;
420 360
421static struct clk_lookup lookups[] = { 361static struct clk_lookup lookups[] = {
@@ -452,7 +392,10 @@ static struct clk_lookup lookups[] = {
452 }, { /* CLCD */ 392 }, { /* CLCD */
453 .dev_id = "dev:20", 393 .dev_id = "dev:20",
454 .clk = &osc4_clk, 394 .clk = &osc4_clk,
455 } 395 }, { /* SP804 timers */
396 .dev_id = "sp804",
397 .clk = &sp804_clk,
398 },
456}; 399};
457 400
458/* 401/*
@@ -473,127 +416,7 @@ static struct clk_lookup lookups[] = {
473#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) 416#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
474#define SYS_CLCD_ID_VGA (0x1f << 8) 417#define SYS_CLCD_ID_VGA (0x1f << 8)
475 418
476static struct clcd_panel vga = { 419static bool is_sanyo_2_5_lcd;
477 .mode = {
478 .name = "VGA",
479 .refresh = 60,
480 .xres = 640,
481 .yres = 480,
482 .pixclock = 39721,
483 .left_margin = 40,
484 .right_margin = 24,
485 .upper_margin = 32,
486 .lower_margin = 11,
487 .hsync_len = 96,
488 .vsync_len = 2,
489 .sync = 0,
490 .vmode = FB_VMODE_NONINTERLACED,
491 },
492 .width = -1,
493 .height = -1,
494 .tim2 = TIM2_BCD | TIM2_IPC,
495 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
496 .bpp = 16,
497};
498
499static struct clcd_panel sanyo_3_8_in = {
500 .mode = {
501 .name = "Sanyo QVGA",
502 .refresh = 116,
503 .xres = 320,
504 .yres = 240,
505 .pixclock = 100000,
506 .left_margin = 6,
507 .right_margin = 6,
508 .upper_margin = 5,
509 .lower_margin = 5,
510 .hsync_len = 6,
511 .vsync_len = 6,
512 .sync = 0,
513 .vmode = FB_VMODE_NONINTERLACED,
514 },
515 .width = -1,
516 .height = -1,
517 .tim2 = TIM2_BCD,
518 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
519 .bpp = 16,
520};
521
522static struct clcd_panel sanyo_2_5_in = {
523 .mode = {
524 .name = "Sanyo QVGA Portrait",
525 .refresh = 116,
526 .xres = 240,
527 .yres = 320,
528 .pixclock = 100000,
529 .left_margin = 20,
530 .right_margin = 10,
531 .upper_margin = 2,
532 .lower_margin = 2,
533 .hsync_len = 10,
534 .vsync_len = 2,
535 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
536 .vmode = FB_VMODE_NONINTERLACED,
537 },
538 .width = -1,
539 .height = -1,
540 .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
541 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
542 .bpp = 16,
543};
544
545static struct clcd_panel epson_2_2_in = {
546 .mode = {
547 .name = "Epson QCIF",
548 .refresh = 390,
549 .xres = 176,
550 .yres = 220,
551 .pixclock = 62500,
552 .left_margin = 3,
553 .right_margin = 2,
554 .upper_margin = 1,
555 .lower_margin = 0,
556 .hsync_len = 3,
557 .vsync_len = 2,
558 .sync = 0,
559 .vmode = FB_VMODE_NONINTERLACED,
560 },
561 .width = -1,
562 .height = -1,
563 .tim2 = TIM2_BCD | TIM2_IPC,
564 .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
565 .bpp = 16,
566};
567
568/*
569 * Detect which LCD panel is connected, and return the appropriate
570 * clcd_panel structure. Note: we do not have any information on
571 * the required timings for the 8.4in panel, so we presently assume
572 * VGA timings.
573 */
574static struct clcd_panel *versatile_clcd_panel(void)
575{
576 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
577 struct clcd_panel *panel = &vga;
578 u32 val;
579
580 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
581 if (val == SYS_CLCD_ID_SANYO_3_8)
582 panel = &sanyo_3_8_in;
583 else if (val == SYS_CLCD_ID_SANYO_2_5)
584 panel = &sanyo_2_5_in;
585 else if (val == SYS_CLCD_ID_EPSON_2_2)
586 panel = &epson_2_2_in;
587 else if (val == SYS_CLCD_ID_VGA)
588 panel = &vga;
589 else {
590 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
591 val);
592 panel = &vga;
593 }
594
595 return panel;
596}
597 420
598/* 421/*
599 * Disable all display connectors on the interface module. 422 * Disable all display connectors on the interface module.
@@ -611,7 +434,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
611 /* 434 /*
612 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off 435 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off
613 */ 436 */
614 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 437 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
615 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 438 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
616 unsigned long ctrl; 439 unsigned long ctrl;
617 440
@@ -627,18 +450,22 @@ static void versatile_clcd_disable(struct clcd_fb *fb)
627 */ 450 */
628static void versatile_clcd_enable(struct clcd_fb *fb) 451static void versatile_clcd_enable(struct clcd_fb *fb)
629{ 452{
453 struct fb_var_screeninfo *var = &fb->fb.var;
630 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; 454 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
631 u32 val; 455 u32 val;
632 456
633 val = readl(sys_clcd); 457 val = readl(sys_clcd);
634 val &= ~SYS_CLCD_MODE_MASK; 458 val &= ~SYS_CLCD_MODE_MASK;
635 459
636 switch (fb->fb.var.green.length) { 460 switch (var->green.length) {
637 case 5: 461 case 5:
638 val |= SYS_CLCD_MODE_5551; 462 val |= SYS_CLCD_MODE_5551;
639 break; 463 break;
640 case 6: 464 case 6:
641 val |= SYS_CLCD_MODE_565_RLSB; 465 if (var->red.offset == 0)
466 val |= SYS_CLCD_MODE_565_RLSB;
467 else
468 val |= SYS_CLCD_MODE_565_BLSB;
642 break; 469 break;
643 case 8: 470 case 8:
644 val |= SYS_CLCD_MODE_888; 471 val |= SYS_CLCD_MODE_888;
@@ -660,7 +487,7 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
660 /* 487 /*
661 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on 488 * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on
662 */ 489 */
663 if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { 490 if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) {
664 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); 491 void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL);
665 unsigned long ctrl; 492 unsigned long ctrl;
666 493
@@ -671,50 +498,62 @@ static void versatile_clcd_enable(struct clcd_fb *fb)
671#endif 498#endif
672} 499}
673 500
674static unsigned long framesize = SZ_1M; 501/*
675 502 * Detect which LCD panel is connected, and return the appropriate
503 * clcd_panel structure. Note: we do not have any information on
504 * the required timings for the 8.4in panel, so we presently assume
505 * VGA timings.
506 */
676static int versatile_clcd_setup(struct clcd_fb *fb) 507static int versatile_clcd_setup(struct clcd_fb *fb)
677{ 508{
678 dma_addr_t dma; 509 void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET;
510 const char *panel_name;
511 u32 val;
679 512
680 fb->panel = versatile_clcd_panel(); 513 is_sanyo_2_5_lcd = false;
681 514
682 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, 515 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
683 &dma, GFP_KERNEL); 516 if (val == SYS_CLCD_ID_SANYO_3_8)
684 if (!fb->fb.screen_base) { 517 panel_name = "Sanyo TM38QV67A02A";
685 printk(KERN_ERR "CLCD: unable to map framebuffer\n"); 518 else if (val == SYS_CLCD_ID_SANYO_2_5) {
686 return -ENOMEM; 519 panel_name = "Sanyo QVGA Portrait";
520 is_sanyo_2_5_lcd = true;
521 } else if (val == SYS_CLCD_ID_EPSON_2_2)
522 panel_name = "Epson L2F50113T00";
523 else if (val == SYS_CLCD_ID_VGA)
524 panel_name = "VGA";
525 else {
526 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
527 val);
528 panel_name = "VGA";
687 } 529 }
688 530
689 fb->fb.fix.smem_start = dma; 531 fb->panel = versatile_clcd_get_panel(panel_name);
690 fb->fb.fix.smem_len = framesize; 532 if (!fb->panel)
533 return -EINVAL;
691 534
692 return 0; 535 return versatile_clcd_setup_dma(fb, SZ_1M);
693} 536}
694 537
695static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) 538static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs)
696{ 539{
697 return dma_mmap_writecombine(&fb->dev->dev, vma, 540 clcdfb_decode(fb, regs);
698 fb->fb.screen_base,
699 fb->fb.fix.smem_start,
700 fb->fb.fix.smem_len);
701}
702 541
703static void versatile_clcd_remove(struct clcd_fb *fb) 542 /* Always clear BGR for RGB565: we do the routing externally */
704{ 543 if (fb->fb.var.green.length == 6)
705 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, 544 regs->cntl &= ~CNTL_BGR;
706 fb->fb.screen_base, fb->fb.fix.smem_start);
707} 545}
708 546
709static struct clcd_board clcd_plat_data = { 547static struct clcd_board clcd_plat_data = {
710 .name = "Versatile", 548 .name = "Versatile",
549 .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
711 .check = clcdfb_check, 550 .check = clcdfb_check,
712 .decode = clcdfb_decode, 551 .decode = versatile_clcd_decode,
713 .disable = versatile_clcd_disable, 552 .disable = versatile_clcd_disable,
714 .enable = versatile_clcd_enable, 553 .enable = versatile_clcd_enable,
715 .setup = versatile_clcd_setup, 554 .setup = versatile_clcd_setup,
716 .mmap = versatile_clcd_mmap, 555 .mmap = versatile_clcd_mmap_dma,
717 .remove = versatile_clcd_remove, 556 .remove = versatile_clcd_remove_dma,
718}; 557};
719 558
720static struct pl061_platform_data gpio0_plat_data = { 559static struct pl061_platform_data gpio0_plat_data = {
@@ -734,53 +573,35 @@ static struct pl022_ssp_controller ssp0_plat_data = {
734}; 573};
735 574
736#define AACI_IRQ { IRQ_AACI, NO_IRQ } 575#define AACI_IRQ { IRQ_AACI, NO_IRQ }
737#define AACI_DMA { 0x80, 0x81 }
738#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } 576#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
739#define MMCI0_DMA { 0x84, 0 }
740#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } 577#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ }
741#define KMI0_DMA { 0, 0 }
742#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } 578#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ }
743#define KMI1_DMA { 0, 0 }
744 579
745/* 580/*
746 * These devices are connected directly to the multi-layer AHB switch 581 * These devices are connected directly to the multi-layer AHB switch
747 */ 582 */
748#define SMC_IRQ { NO_IRQ, NO_IRQ } 583#define SMC_IRQ { NO_IRQ, NO_IRQ }
749#define SMC_DMA { 0, 0 }
750#define MPMC_IRQ { NO_IRQ, NO_IRQ } 584#define MPMC_IRQ { NO_IRQ, NO_IRQ }
751#define MPMC_DMA { 0, 0 }
752#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } 585#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
753#define CLCD_DMA { 0, 0 }
754#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } 586#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
755#define DMAC_DMA { 0, 0 }
756 587
757/* 588/*
758 * These devices are connected via the core APB bridge 589 * These devices are connected via the core APB bridge
759 */ 590 */
760#define SCTL_IRQ { NO_IRQ, NO_IRQ } 591#define SCTL_IRQ { NO_IRQ, NO_IRQ }
761#define SCTL_DMA { 0, 0 }
762#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } 592#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
763#define WATCHDOG_DMA { 0, 0 }
764#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } 593#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
765#define GPIO0_DMA { 0, 0 }
766#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } 594#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
767#define GPIO1_DMA { 0, 0 }
768#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } 595#define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
769#define RTC_DMA { 0, 0 }
770 596
771/* 597/*
772 * These devices are connected via the DMA APB bridge 598 * These devices are connected via the DMA APB bridge
773 */ 599 */
774#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } 600#define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
775#define SCI_DMA { 7, 6 }
776#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } 601#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
777#define UART0_DMA { 15, 14 }
778#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } 602#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
779#define UART1_DMA { 13, 12 }
780#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } 603#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
781#define UART2_DMA { 11, 10 }
782#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } 604#define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
783#define SSP_DMA { 9, 8 }
784 605
785/* FPGA Primecells */ 606/* FPGA Primecells */
786AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); 607AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
@@ -862,14 +683,21 @@ static void versatile_leds_event(led_event_t ledevt)
862} 683}
863#endif /* CONFIG_LEDS */ 684#endif /* CONFIG_LEDS */
864 685
865void __init versatile_init(void) 686/* Early initializations */
687void __init versatile_init_early(void)
866{ 688{
867 int i; 689 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
868
869 osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
870 690
691 osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET;
871 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 692 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
872 693
694 versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);
695}
696
697void __init versatile_init(void)
698{
699 int i;
700
873 platform_device_register(&versatile_flash_device); 701 platform_device_register(&versatile_flash_device);
874 platform_device_register(&versatile_i2c_device); 702 platform_device_register(&versatile_i2c_device);
875 platform_device_register(&smc91x_device); 703 platform_device_register(&smc91x_device);
@@ -920,8 +748,8 @@ static void __init versatile_timer_init(void)
920 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 748 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
921 writel(0, TIMER3_VA_BASE + TIMER_CTRL); 749 writel(0, TIMER3_VA_BASE + TIMER_CTRL);
922 750
923 sp804_clocksource_init(TIMER3_VA_BASE); 751 sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
924 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1); 752 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1, "timer0");
925} 753}
926 754
927struct sys_timer versatile_timer = { 755struct sys_timer versatile_timer = {
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index 9d39886a8351..fd6404e5d788 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -25,6 +25,7 @@
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26 26
27extern void __init versatile_init(void); 27extern void __init versatile_init(void);
28extern void __init versatile_init_early(void);
28extern void __init versatile_init_irq(void); 29extern void __init versatile_init_irq(void);
29extern void __init versatile_map_io(void); 30extern void __init versatile_map_io(void);
30extern struct sys_timer versatile_timer; 31extern struct sys_timer versatile_timer;
@@ -44,7 +45,6 @@ static struct amba_device name##_device = { \
44 }, \ 45 }, \
45 .dma_mask = ~0, \ 46 .dma_mask = ~0, \
46 .irq = base##_IRQ, \ 47 .irq = base##_IRQ, \
47 /* .dma = base##_DMA,*/ \
48} 48}
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-versatile/include/mach/debug-macro.S b/arch/arm/mach-versatile/include/mach/debug-macro.S
index 6fea7199c626..eb2cf7dc5c44 100644
--- a/arch/arm/mach-versatile/include/mach/debug-macro.S
+++ b/arch/arm/mach-versatile/include/mach/debug-macro.S
@@ -11,13 +11,11 @@
11 * 11 *
12*/ 12*/
13 13
14 .macro addruart, rx, tmp 14 .macro addruart, rp, rv
15 mrc p15, 0, \rx, c1, c0 15 mov \rp, #0x001F0000
16 tst \rx, #1 @ MMU enabled? 16 orr \rp, \rp, #0x00001000
17 moveq \rx, #0x10000000 17 orr \rv, \rp, #0xf1000000 @ virtual base
18 movne \rx, #0xf1000000 @ virtual base 18 orr \rp, \rp, #0x10000000 @ physical base
19 orr \rx, \rx, #0x001F0000
20 orr \rx, \rx, #0x00001000
21 .endm 19 .endm
22 20
23#include <asm/hardware/debug-pl01x.S> 21#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index b5e75bb44965..6911e1f5f156 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -39,6 +39,6 @@
39/* macro to get at IO space when running virtually */ 39/* macro to get at IO space when running virtually */
40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 40#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
41 41
42#define __io_address(n) __io(IO_ADDRESS(n)) 42#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
43 43
44#endif 44#endif
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
index 79aeab86b903..dacc9d8e4e6a 100644
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ b/arch/arm/mach-versatile/include/mach/memory.h
@@ -23,6 +23,6 @@
23/* 23/*
24 * Physical DRAM offset. 24 * Physical DRAM offset.
25 */ 25 */
26#define PHYS_OFFSET UL(0x00000000) 26#define PLAT_PHYS_OFFSET UL(0x00000000)
27 27
28#endif 28#endif
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h
index 427e3612db5d..7d8e069ad51b 100644
--- a/arch/arm/mach-versatile/include/mach/vmalloc.h
+++ b/arch/arm/mach-versatile/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000) 21#define VMALLOC_END 0xd8000000UL
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index bb8ec7724f79..f8ae64b3eed0 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -35,10 +35,9 @@
35 35
36MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") 36MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 37 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
38 .phys_io = 0x101f1000,
39 .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
40 .boot_params = 0x00000100, 38 .boot_params = 0x00000100,
41 .map_io = versatile_map_io, 39 .map_io = versatile_map_io,
40 .init_early = versatile_init_early,
42 .init_irq = versatile_init_irq, 41 .init_irq = versatile_init_irq,
43 .timer = &versatile_timer, 42 .timer = &versatile_timer,
44 .init_machine = versatile_init, 43 .init_machine = versatile_init,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 239cd30fc4f5..37c23dfeefb7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -59,19 +59,14 @@ static struct pl061_platform_data gpio3_plat_data = {
59}; 59};
60 60
61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 61#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
62#define UART3_DMA { 0x86, 0x87 }
63#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 62#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
64#define SCI1_DMA { 0x88, 0x89 }
65#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 63#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
66#define MMCI1_DMA { 0x85, 0 }
67 64
68/* 65/*
69 * These devices are connected via the core APB bridge 66 * These devices are connected via the core APB bridge
70 */ 67 */
71#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
72#define GPIO2_DMA { 0, 0 }
73#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
74#define GPIO3_DMA { 0, 0 }
75 70
76/* 71/*
77 * These devices are connected via the DMA APB bridge 72 * These devices are connected via the DMA APB bridge
@@ -108,10 +103,9 @@ static void __init versatile_pb_init(void)
108 103
109MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") 104MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
110 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 105 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
111 .phys_io = 0x101f1000,
112 .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc,
113 .boot_params = 0x00000100, 106 .boot_params = 0x00000100,
114 .map_io = versatile_map_io, 107 .map_io = versatile_map_io,
108 .init_early = versatile_init_early,
115 .init_irq = versatile_init_irq, 109 .init_irq = versatile_init_irq,
116 .timer = &versatile_timer, 110 .timer = &versatile_timer,
117 .init_machine = versatile_pb_init, 111 .init_machine = versatile_pb_init,