diff options
| author | Philippe Langlais <philippe.langlais@linaro.org> | 2011-01-27 08:37:07 -0500 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2011-03-14 09:05:11 -0400 |
| commit | fbdc6d11ae0594fb03f4c5556cbb8ff46e1971e3 (patch) | |
| tree | 582b89ff6b0d1c432edd4e37248a2f95df974314 /arch/arm/mach-ux500 | |
| parent | bb3b218756e061b1e51c1593684be0261482e399 (diff) | |
mach-ux500: set sd/mmc clock rate to 100MHz
The clock speed for the SD/MMC clock was incorrect, rectify it.
Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500')
| -rw-r--r-- | arch/arm/mach-ux500/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index b2b0a3b9be8f..9a0a6ed9cd5d 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c | |||
| @@ -313,7 +313,7 @@ static DEFINE_PRCMU_CLK_RATE(uartclk, 0x0, 5, UARTCLK, 38400000); | |||
| 313 | static DEFINE_PRCMU_CLK(msp02clk, 0x0, 6, MSP02CLK); | 313 | static DEFINE_PRCMU_CLK(msp02clk, 0x0, 6, MSP02CLK); |
| 314 | static DEFINE_PRCMU_CLK(msp1clk, 0x0, 7, MSP1CLK); /* v1 */ | 314 | static DEFINE_PRCMU_CLK(msp1clk, 0x0, 7, MSP1CLK); /* v1 */ |
| 315 | static DEFINE_PRCMU_CLK_RATE(i2cclk, 0x0, 8, I2CCLK, 48000000); | 315 | static DEFINE_PRCMU_CLK_RATE(i2cclk, 0x0, 8, I2CCLK, 48000000); |
| 316 | static DEFINE_PRCMU_CLK_RATE(sdmmcclk, 0x0, 9, SDMMCCLK, 50000000); | 316 | static DEFINE_PRCMU_CLK_RATE(sdmmcclk, 0x0, 9, SDMMCCLK, 100000000); |
| 317 | static DEFINE_PRCMU_CLK(slimclk, 0x0, 10, SLIMCLK); | 317 | static DEFINE_PRCMU_CLK(slimclk, 0x0, 10, SLIMCLK); |
| 318 | static DEFINE_PRCMU_CLK(per1clk, 0x0, 11, PER1CLK); | 318 | static DEFINE_PRCMU_CLK(per1clk, 0x0, 11, PER1CLK); |
| 319 | static DEFINE_PRCMU_CLK(per2clk, 0x0, 12, PER2CLK); | 319 | static DEFINE_PRCMU_CLK(per2clk, 0x0, 12, PER2CLK); |