Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)
  DMAENGINE: move COH901318 to arch_initcall
  dma: imx-dma: fix signedness bug
  dma/timberdale: simplify conditional
  ste_dma40: remove channel_type
  ste_dma40: remove enum for endianess
  ste_dma40: remove TIM_FOR_LINK option
  ste_dma40: move mode_opt to separate config
  ste_dma40: move channel mode to a separate field
  ste_dma40: move priority to separate field
  ste_dma40: add variable to indicate valid dma_cfg
  async_tx: make async_tx channel switching opt-in
  move async raid6 test to lib/Kconfig.debug
  dmaengine: Add Freescale i.MX1/21/27 DMA driver
  intel_mid_dma: change the slave interface
  intel_mid_dma: fix the WARN_ONs
  intel_mid_dma: Add sg list support to DMA driver
  intel_mid_dma: Allow DMAC2 to share interrupt
  intel_mid_dma: Allow IRQ sharing
  intel_mid_dma: Add runtime PM support
  DMAENGINE: define a dummy filter function for ste_dma40
  ...

1 files changed, 1 insertions, 12 deletions

diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index cbbe69a76a7c..4a94be3304b9 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -208,35 +208,25 @@ static struct resource dma40_resources[] = {
 
 /* Default configuration for physcial memcpy */
 struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
-        .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE |
-                         STEDMA40_LOW_PRIORITY_CHANNEL |
-                         STEDMA40_PCHAN_BASIC_MODE),
+        .mode = STEDMA40_MODE_PHYSICAL,
         .dir = STEDMA40_MEM_TO_MEM,
 
-        .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
         .src_info.data_width = STEDMA40_BYTE_WIDTH,
         .src_info.psize = STEDMA40_PSIZE_PHY_1,
         .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
 
-        .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
         .dst_info.data_width = STEDMA40_BYTE_WIDTH,
         .dst_info.psize = STEDMA40_PSIZE_PHY_1,
         .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
 };
 /* Default configuration for logical memcpy */
 struct stedma40_chan_cfg dma40_memcpy_conf_log = {
-        .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
-                         STEDMA40_LOW_PRIORITY_CHANNEL |
-                         STEDMA40_LCHAN_SRC_LOG_DST_LOG |
-                         STEDMA40_NO_TIM_FOR_LINK),
         .dir = STEDMA40_MEM_TO_MEM,
 
-        .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
         .src_info.data_width = STEDMA40_BYTE_WIDTH,
         .src_info.psize = STEDMA40_PSIZE_LOG_1,
         .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
 
-        .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
         .dst_info.data_width = STEDMA40_BYTE_WIDTH,
         .dst_info.psize = STEDMA40_PSIZE_LOG_1,
         .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
@@ -269,7 +259,6 @@ static struct stedma40_platform_data dma40_plat_data = {
         .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
         .memcpy_conf_phy = &dma40_memcpy_conf_phy,
         .memcpy_conf_log = &dma40_memcpy_conf_log,
-        .llis_per_log = 8,
         .disabled_channels = {-1},
 };